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Message-Id: <20240920-dev-maxh-svukte-rebase-v1-0-7864a88a62bd@sifive.com>
Date: Fri, 20 Sep 2024 15:39:02 +0800
From: Max Hsu <max.hsu@...ive.com>
To: Conor Dooley <conor@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
Anup Patel <anup@...infault.org>, Atish Patra <atishp@...shpatra.org>
Cc: Palmer Dabbelt <palmer@...ive.com>, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
Max Hsu <max.hsu@...ive.com>, Samuel Holland <samuel.holland@...ive.com>
Subject: [PATCH RFC 0/3] riscv: add Svukte extension
RISC-V privileged spec will be added with Svukte extension [1]
Svukte introduce senvcfg.UKTE and hstatus.HUKTE bitfield.
which makes user-mode access to supervisor memory raise page faults
in constant time, mitigating attacks that attempt to discover the
supervisor software's address-space layout.
The following patches add
- dt-binding of Svukte ISA string
- CSR bit definition, ISA detection, senvcfg.UKTE enablement in kernel
- KVM ONE_REG support for Svukte extension
This patch series is based on v6.11
Link: https://github.com/riscv/riscv-isa-manual/pull/1564 [1]
Signed-off-by: Max Hsu <max.hsu@...ive.com>
---
Max Hsu (3):
dt-bindings: riscv: Add Svukte entry
riscv: Add Svukte extension support
riscv: KVM: Add Svukte extension support for Guest/VM
Documentation/devicetree/bindings/riscv/extensions.yaml | 7 +++++++
arch/riscv/include/asm/csr.h | 2 ++
arch/riscv/include/asm/hwcap.h | 1 +
arch/riscv/include/uapi/asm/kvm.h | 1 +
arch/riscv/kernel/cpufeature.c | 4 ++++
arch/riscv/kvm/vcpu_onereg.c | 1 +
6 files changed, 16 insertions(+)
---
base-commit: 186617d883560848f801732bfecefa0c2f702a0f
change-id: 20240920-dev-maxh-svukte-rebase-ce96dba93381
Best regards,
--
Max Hsu <max.hsu@...ive.com>
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