linux-kernel - RE: [PATCH v11] i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled

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Message-ID: <c81956a4215a4ca587b9c4e541b0cb0d@siengine.com>
Date: Fri, 20 Sep 2024 09:41:14 +0000
From: Liu Kimriver/刘金河 <kimriver.liu@...ngine.com>
To: Andi Shyti <andi.shyti@...nel.org>
CC: "jarkko.nikula@...ux.intel.com" <jarkko.nikula@...ux.intel.com>,
        "andriy.shevchenko@...ux.intel.com" <andriy.shevchenko@...ux.intel.com>,
        "mika.westerberg@...ux.intel.com" <mika.westerberg@...ux.intel.com>,
        "jsd@...ihalf.com" <jsd@...ihalf.com>,
        "linux-i2c@...r.kernel.org"
	<linux-i2c@...r.kernel.org>,
        "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>,
        Andy Shevchenko <andy@...nel.org>
Subject: RE: [PATCH v11] i2c: designware: fix controller is holding SCL low
 while ENABLE bit is disabled

HI, Andi

>-----Original Message-----
>From: Andi Shyti <andi.shyti@...nel.org> 
>Sent: 2024年9月20日 16:52
>To: Liu Kimriver/刘金河 <kimriver.liu@...ngine.com>
>Cc: jarkko.nikula@...ux.intel.com; andriy.shevchenko@...ux.intel.com; mika.westerberg@...ux.intel.com; jsd@...ihalf.com; linux-i2c@...r.kernel.org; linux-kernel@...r.kernel.org; Andy Shevchenko ><andy@...nel.org>
>Subject: Re: [PATCH v11] i2c: designware: fix controller is holding SCL low while ENABLE bit is disabled

>Hi Kimriver,

>On Fri, Sep 13, 2024 at 11:31:46AM GMT, Kimriver Liu wrote:
>> It was observed that issuing the ABORT bit (IC_ENABLE[1]) will not
>> work when IC_ENABLE is already disabled.
>> 
>> Check if the ENABLE bit (IC_ENABLE[0]) is disabled when the controller
>> is holding SCL low. If the ENABLE bit is disabled, the software needs
>> to enable it before trying to issue the ABORT bit. otherwise,
>> the controller ignores any write to ABORT bit.
>> 
>> These kernel logs show up whenever an I2C transaction is
>> attempted after this failure.
>> i2c_designware e95e0000.i2c: timeout waiting for bus ready
>> i2c_designware e95e0000.i2c: timeout in disabling adapter
>> 
>> The patch fixes the issue where the controller cannot be disabled
>> while SCL is held low if the ENABLE bit is already disabled.
>> 
>> Fixes: 2409205acd3c ("i2c: designware: fix __i2c_dw_disable() in case master is holding SCL low")
>> Signed-off-by: Kimriver Liu <kimriver.liu@...ngine.com>
>> Reviewed-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
>> Acked-by: Jarkko Nikula <jarkko.nikula@...ux.intel.com>
>> Reviewed-by: Andy Shevchenko <andy@...nel.org>

>I'm sorry for the delay, but I needed to wait for the previous
>batch of fixes to be merged.
>
> [...]
>
>> +/*
>> + * This function waits controller idling before disabling I2C
>> + * When the controller is not in the IDLE state,
>> + * MST_ACTIVITY bit (IC_STATUS[5]) is set.
>> + * Values:
>> + * 0x1 (ACTIVE): Controller not idle
>> + * 0x0 (IDLE): Controller is idle
>> + * The function is called after returning the end of the current transfer
>> + * Returns:
>> + * False when controller is in IDLE state.
>> + * True when controller is in ACTIVE state.
>> + */

>I took the liberty of making some small changes to the comment:

>+/*
>+ * This function waits for the controller to be idle before disabling I2C
>+ * When the controller is not in the IDLE state, the MST_ACTIVITY bit
>+ * (IC_STATUS[5]) is set.
>+ *
>+ * Values:
>+ * 0x1 (ACTIVE): Controller not idle
>+ * 0x0 (IDLE): Controller is idle
>+ *
>+ * The function is called after completing the current transfer.
>+ *
>+ * Returns:
>+ * False when the controller is in the IDLE state.
>+ * True when the controller is in the ACTIVE state.
>+ */

>for an improved clarity and address a few grammatical issues.
>Please verify that it's correct.

>I merged your patch to i2c/i2c-host-fixes along with the latest 
>changes proposed by Andy.

>Thanks for your work,
>Andi

Your small changes make the comments clearer and more perfect.
Thanks.
------------------------------------------
Best Regards
Kimriver Liu