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Message-ID: <20240920-reapply-amusement-a37cf13fd910@squawk>
Date: Fri, 20 Sep 2024 13:46:17 +0100
From: Conor Dooley <conor@...nel.org>
To: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Chester Lin <chester62515@...il.com>,
Matthias Brugger <mbrugger@...e.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Rafael J. Wysocki" <rafael@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
NXP S32 Linux Team <s32@....com>
Subject: Re: [PATCH v3 2/4] dt-bindings: gpio: add support for NXP
S32G2/S32G3 SoCs
On Thu, Sep 19, 2024 at 04:47:22PM +0300, Andrei Stefanescu wrote:
> Add support for the GPIO driver of the NXP S32G2/S32G3 SoCs.
>
> Signed-off-by: Phu Luu An <phu.luuan@....com>
> Signed-off-by: Larisa Grigore <larisa.grigore@....com>
> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@....com>
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
> ---
> .../bindings/gpio/nxp,s32g2-siul2-gpio.yaml | 107 ++++++++++++++++++
> 1 file changed, 107 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml
>
> diff --git a/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml
> new file mode 100644
> index 000000000000..0548028e6745
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/gpio/nxp,s32g2-siul2-gpio.yaml
> @@ -0,0 +1,107 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
> +# Copyright 2024 NXP
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/gpio/nxp,s32g2-siul2-gpio.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP S32G2 SIUL2 GPIO controller
> +
> +maintainers:
> + - Ghennadi Procopciuc <Ghennadi.Procopciuc@....com>
> + - Larisa Grigore <larisa.grigore@....com>
> + - Andrei Stefanescu <andrei.stefanescu@....nxp.com>
> +
> +description:
> + Support for the SIUL2 GPIOs found on the S32G2 and S32G3
> + chips. It includes an IRQ controller for all pins which have
> + an EIRQ associated.
> +
> +properties:
> + compatible:
> + items:
> + - const: nxp,s32g2-siul2-gpio
Commit message and binding description say s32g2 and s32g3, but there's
only a compatible here for g2.
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