linux-kernel - RE: [PATCH v3 3/3] x86/mce: Add CMCI storm switching support for Zhaoxin

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Message-ID: <CY8PR11MB7134C3A419C1A093C9E86284896D2@CY8PR11MB7134.namprd11.prod.outlook.com>
Date: Sat, 21 Sep 2024 05:39:22 +0000
From: "Zhuo, Qiuxu" <qiuxu.zhuo@...el.com>
To: Yazen Ghannam <yazen.ghannam@....com>
CC: Tony W Wang-oc <TonyWWang-oc@...oxin.com>, "tglx@...utronix.de"
	<tglx@...utronix.de>, "mingo@...hat.com" <mingo@...hat.com>, "bp@...en8.de"
	<bp@...en8.de>, "dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
	"x86@...nel.org" <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>, "Luck,
 Tony" <tony.luck@...el.com>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, "linux-edac@...r.kernel.org"
	<linux-edac@...r.kernel.org>, "CobeChen@...oxin.com" <CobeChen@...oxin.com>,
	"TimGuo@...oxin.com" <TimGuo@...oxin.com>, "LeoLiu-oc@...oxin.com"
	<LeoLiu-oc@...oxin.com>, Lyle Li <LyleLi@...oxin.com>
Subject: RE: [PATCH v3 3/3] x86/mce: Add CMCI storm switching support for
 Zhaoxin

> From: Yazen Ghannam <yazen.ghannam@....com>
> Sent: Friday, September 20, 2024 9:36 PM
> [...]
> > So, this is just you want to disable CMCI when a CMCI storm happens.
> > This doesn't explain much to me.
> > What's the problem if not disable CMCI when a CMCI storm happens?
> >
> 
> A more direct way to handle an interrupt storm is to turn off the interrupt. The
> proposed AMD solution would also do this.
> 
> Reprogramming the threshold to a high value does not 100% guarantee that a
> storm will be mitigated. But this is a necessary trade-off given that the CMCI is
> used to report other error types on Intel systems.

Thanks for your comments.