linux-kernel - Re: [PATCH v7 13/24] x86/resctrl: Add data structures and definitions for ABMC assignment

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <520817d3-6521-4320-b6a2-d0695a5d3699@amd.com>
Date: Mon, 23 Sep 2024 15:21:12 -0500
From: "Moger, Babu" <babu.moger@....com>
To: Reinette Chatre <reinette.chatre@...el.com>, corbet@....net,
 fenghua.yu@...el.com, tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
 dave.hansen@...ux.intel.com
Cc: x86@...nel.org, hpa@...or.com, paulmck@...nel.org, rdunlap@...radead.org,
 tj@...nel.org, peterz@...radead.org, yanjiewtw@...il.com,
 kim.phillips@....com, lukas.bulwahn@...il.com, seanjc@...gle.com,
 jmattson@...gle.com, leitao@...ian.org, jpoimboe@...nel.org,
 rick.p.edgecombe@...el.com, kirill.shutemov@...ux.intel.com,
 jithu.joseph@...el.com, kai.huang@...el.com, kan.liang@...ux.intel.com,
 daniel.sneddon@...ux.intel.com, pbonzini@...hat.com, sandipan.das@....com,
 ilpo.jarvinen@...ux.intel.com, peternewman@...gle.com,
 maciej.wieczor-retman@...el.com, linux-doc@...r.kernel.org,
 linux-kernel@...r.kernel.org, eranian@...gle.com, james.morse@....com
Subject: Re: [PATCH v7 13/24] x86/resctrl: Add data structures and definitions
 for ABMC assignment

Hi Reinette,

On 9/19/24 12:08, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/4/24 3:21 PM, Babu Moger wrote:
>> +/*
>> + * ABMC counters can be configured by writing to L3_QOS_ABMC_CFG.
>> + * @bw_type		: Bandwidth configuration(supported by BMEC)
>> + *			  tracked by the @cntr_id.
>> + * @bw_src		: Bandwidth source (RMID or CLOSID).
>> + * @reserved1		: Reserved.
>> + * @is_clos		: @bw_src field is a CLOSID (not an RMID).
>> + * @cntr_id		: Counter identifier.
>> + * @reserved		: Reserved.
>> + * @cntr_en		: Tracking enable bit.
>> + * @cfg_en		: Configuration enable bit.
>> + *
>> + * Configuration and tracking:
>> + * CfgEn=1,CtrEn=0 : Configure CtrID and but no tracking the events yet.
>> + * CfgEn=1,CtrEn=1 : Configure CtrID and start tracking events.
> 
> Thanks for moving the text ... could it now be made to match the new (outside
> AMD arch document) destination? For example, "CfgEn" becomes "@cfg_en",

Sure. Will do.

> "CtrID" becomes "@cntr_id" etc. Also please fix language, for example
> what does "and but no tracking the events yet" mean? So far this work
> has focused on "counting" vs "not counting" events and it is not

I will change the text to "not counting".  Hope this will clarify here.

> clear how this "tracking" fits it ... this seems to be the hardware
> view that means "tracking the RMID to which @cntr_id is assigned"?
> Please help readers to understand how the implementation is supported
> by the hardware.

I have checked with hw team on this.
CfgEn: This corresponds counter assignment.
CtrEn: This is to start or stop counting.
       We always set this to 1 to start counting.
-- 
Thanks
Babu Moger