linux-kernel - Re: [PATCH v3 2/4] dt-bindings: gpio: add support for NXP S32G2/S32G3 SoCs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20240923-clatter-barometer-102125af2de3@spud>
Date: Mon, 23 Sep 2024 22:35:23 +0100
From: Conor Dooley <conor@...nel.org>
To: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
Cc: Krzysztof Kozlowski <krzk@...nel.org>,
	Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Chester Lin <chester62515@...il.com>,
	Matthias Brugger <mbrugger@...e.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	"Rafael J. Wysocki" <rafael@...nel.org>, linux-gpio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	NXP S32 Linux Team <s32@....com>
Subject: Re: [PATCH v3 2/4] dt-bindings: gpio: add support for NXP
 S32G2/S32G3 SoCs

On Mon, Sep 23, 2024 at 10:34:05PM +0100, Conor Dooley wrote:
> On Mon, Sep 23, 2024 at 01:47:25PM +0300, Andrei Stefanescu wrote:
> > Hi,
> > 
> > On 23/09/2024 00:07, Conor Dooley wrote:
> > > On Sun, Sep 22, 2024 at 11:04:22PM +0200, Krzysztof Kozlowski wrote:
> > >> On Sat, Sep 21, 2024 at 10:58:46PM +0100, Conor Dooley wrote:
> > >>> On Fri, Sep 20, 2024 at 03:40:31PM +0200, Krzysztof Kozlowski wrote:
> > >>>> On 20/09/2024 15:33, Andrei Stefanescu wrote:
> > > 
> > >>>>>>> +properties:
> > >>>>>>> +  compatible:
> > >>>>>>> +    items:
> > >>>>>>> +      - const: nxp,s32g2-siul2-gpio
> > >>>>>>
> > >>>>>> Commit message and binding description say s32g2 and s32g3, but there's
> > >>>>>> only a compatible here for g2.
> > >>>>>
> > >>>>> Yes, the SIUL2 GPIO hardware is the same for both S32G2 and S32G3 SoCs. I plan
> > >>>>> to reuse the same compatible when I add the SIUL2 GPIO device tree node for
> > >>>>> the S32G3 boards. Would that be ok?
> > >>>>
> > >>>> There are only few exceptions where re-using compatible is allowed. Was
> > >>>> S32G on them? Please consult existing practice/maintainers and past reviews.
> > 
> > I will add another compatible: "nxp,s32g3-siul2-gpio" for the S32G3 SoC. We currently
> > also have the SIUL2 pinctrl driver in upstream with only one compatible:
> > "nxp,s32g2-siul2-pinctrl". Should I also send a separate patch to add an S32G3 compatible
> > to it?
> > 
> 
> That would be great, thanks.

Wait, the driver doesn't need to have 2 compatibles, only the binding
does. Make the g3 compatible fall back to the g2 one, and the driver
doesn't need to change.

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)