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Message-ID: <202409241307.hzwOrV5I-lkp@intel.com>
Date: Tue, 24 Sep 2024 13:39:53 +0800
From: kernel test robot <lkp@...el.com>
To: David Howells <dhowells@...hat.com>
Cc: oe-kbuild-all@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: arch/loongarch/include/asm/cmpxchg.h:70:42: sparse: sparse: cast
truncates bits from constant value (8000000000000000 becomes 0)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: abf2050f51fdca0fd146388f83cddd95a57a008d
commit: 453924de6212ac159f946b75c6b59918e2e30944 afs: Overhaul invalidation handling to better support RO volumes
date: 9 months ago
config: loongarch-randconfig-r121-20240922 (https://download.01.org/0day-ci/archive/20240924/202409241307.hzwOrV5I-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 14.1.0
reproduce: (https://download.01.org/0day-ci/archive/20240924/202409241307.hzwOrV5I-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202409241307.hzwOrV5I-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
fs/afs/callback.c: note: in included file (through arch/loongarch/include/asm/atomic.h, include/linux/atomic.h, include/asm-generic/bitops/atomic.h, ...):
>> arch/loongarch/include/asm/cmpxchg.h:70:42: sparse: sparse: cast truncates bits from constant value (8000000000000000 becomes 0)
arch/loongarch/include/asm/cmpxchg.h:73:24: sparse: sparse: cast truncates bits from constant value (8000000000000000 becomes 0)
fs/afs/callback.c:146:22: sparse: sparse: context imbalance in 'afs_lookup_volume_rcu' - different lock contexts for basic block
--
fs/afs/rotate.c: note: in included file (through arch/loongarch/include/asm/atomic.h, include/linux/atomic.h, include/asm-generic/bitops/atomic.h, ...):
>> arch/loongarch/include/asm/cmpxchg.h:70:42: sparse: sparse: cast truncates bits from constant value (8000000000000000 becomes 0)
arch/loongarch/include/asm/cmpxchg.h:73:24: sparse: sparse: cast truncates bits from constant value (8000000000000000 becomes 0)
vim +70 arch/loongarch/include/asm/cmpxchg.h
720dc7ab252bbd Huacai Chen 2022-08-25 63
ddf502717da029 Huacai Chen 2022-10-12 64 static __always_inline unsigned long
068550631fbe0b Andrzej Hajda 2023-01-18 65 __arch_xchg(volatile void *ptr, unsigned long x, int size)
5b0b14e550a006 Huacai Chen 2022-05-31 66 {
5b0b14e550a006 Huacai Chen 2022-05-31 67 switch (size) {
720dc7ab252bbd Huacai Chen 2022-08-25 68 case 1:
720dc7ab252bbd Huacai Chen 2022-08-25 69 case 2:
720dc7ab252bbd Huacai Chen 2022-08-25 @70 return __xchg_small(ptr, x, size);
720dc7ab252bbd Huacai Chen 2022-08-25 71
5b0b14e550a006 Huacai Chen 2022-05-31 72 case 4:
5b0b14e550a006 Huacai Chen 2022-05-31 73 return __xchg_asm("amswap_db.w", (volatile u32 *)ptr, (u32)x);
5b0b14e550a006 Huacai Chen 2022-05-31 74
5b0b14e550a006 Huacai Chen 2022-05-31 75 case 8:
5b0b14e550a006 Huacai Chen 2022-05-31 76 return __xchg_asm("amswap_db.d", (volatile u64 *)ptr, (u64)x);
5b0b14e550a006 Huacai Chen 2022-05-31 77
5b0b14e550a006 Huacai Chen 2022-05-31 78 default:
5b0b14e550a006 Huacai Chen 2022-05-31 79 BUILD_BUG();
5b0b14e550a006 Huacai Chen 2022-05-31 80 }
5b0b14e550a006 Huacai Chen 2022-05-31 81
5b0b14e550a006 Huacai Chen 2022-05-31 82 return 0;
5b0b14e550a006 Huacai Chen 2022-05-31 83 }
5b0b14e550a006 Huacai Chen 2022-05-31 84
:::::: The code at line 70 was first introduced by commit
:::::: 720dc7ab252bbdf404cab7b909e26b31e602bf7e LoongArch: Add subword xchg/cmpxchg emulation
:::::: TO: Huacai Chen <chenhuacai@...ngson.cn>
:::::: CC: Huacai Chen <chenhuacai@...ngson.cn>
--
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