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Message-ID: <20240924065020.2009975-1-quic_mmanikan@quicinc.com>
Date: Tue, 24 Sep 2024 12:20:20 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andi.shyti@...nel.org>, <quic_mmanikan@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for IPQ5424

The IPQ5424 I2C SE clock operates at a frequency of 32MHz. Since the
existing map table is based on 19.2MHz, this patch incorporate the
clock map table to derive the SCL clock from the 32MHz SE clock.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
 drivers/i2c/busses/i2c-qcom-geni.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
index 212336f724a6..bbd9ecf09f4b 100644
--- a/drivers/i2c/busses/i2c-qcom-geni.c
+++ b/drivers/i2c/busses/i2c-qcom-geni.c
@@ -71,6 +71,7 @@ enum geni_i2c_err_code {
 
 #define I2C_AUTO_SUSPEND_DELAY	250
 #define KHZ(freq)		(1000 * freq)
+#define MHZ(freq)		(1000000 * freq)
 #define PACKING_BYTES_PW	4
 
 #define ABORT_TIMEOUT		HZ
@@ -152,11 +153,21 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map[] = {
 	{KHZ(1000), 1, 3,  9, 18},
 };
 
+/* source_clock = 32 MHz */
+static const struct geni_i2c_clk_fld geni_i2c_clk_map_32M[] = {
+	{KHZ(100), 7, 14, 18, 40},
+	{KHZ(400), 4,  3, 11, 20},
+	{KHZ(1000), 4, 3,  6, 15},
+};
+
 static int geni_i2c_clk_map_idx(struct geni_i2c_dev *gi2c)
 {
 	int i;
 	const struct geni_i2c_clk_fld *itr = geni_i2c_clk_map;
 
+	if (clk_get_rate(gi2c->se.clk) == MHZ(32))
+		itr = geni_i2c_clk_map_32M;
+
 	for (i = 0; i < ARRAY_SIZE(geni_i2c_clk_map); i++, itr++) {
 		if (itr->clk_freq_out == gi2c->clk_freq_out) {
 			gi2c->clk_fld = itr;
-- 
2.34.1


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