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Message-ID: <20240924103156.13119-3-macpaul.lin@mediatek.com>
Date: Tue, 24 Sep 2024 18:31:53 +0800
From: Macpaul Lin <macpaul.lin@...iatek.com>
To: Chun-Kuang Hu <chunkuang.hu@...nel.org>, Philipp Zabel
<p.zabel@...gutronix.de>, Maarten Lankhorst
<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>, Rob Herring <robh@...nel.org>, "Krzysztof
Kozlowski" <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Yong Wu
<yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>, Will Deacon
<will@...nel.org>, Robin Murphy <robin.murphy@....com>, Matthias Brugger
<matthias.bgg@...il.com>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, <dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
<linux-arm-kernel@...ts.infradead.org>, Alexandre Mergnat
<amergnat@...libre.com>
CC: Bear Wang <bear.wang@...iatek.com>, Pablo Sun <pablo.sun@...iatek.com>,
Macpaul Lin <macpaul.lin@...iatek.com>, Macpaul Lin <macpaul@...il.com>, "Sen
Chu" <sen.chu@...iatek.com>, Chris-qj chen <chris-qj.chen@...iatek.com>,
MediaTek Chromebook Upstream
<Project_Global_Chrome_Upstream_Group@...iatek.com>, Chen-Yu Tsai
<wenst@...omium.org>
Subject: [PATCH 3/6] dt-bindings: display: mediatek: Fix clocks count constraint for new SoCs
The display node in mt8195.dtsi was triggering a CHECK_DTBS error due
to an excessively long 'clocks' property:
display@...06000: clocks: [[31, 14], [31, 43], [31, 44]] is too long
To resolve this issue, add "maxItems: 3" to the 'clocks' property in
the DT schema.
Fixes: 4ed545e7d100 ("dt-bindings: display: mediatek: disp: split each block to individual yaml")
Signed-off-by: Macpaul Lin <macpaul.lin@...iatek.com>
---
.../devicetree/bindings/display/mediatek/mediatek,split.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml
index e4affc854f3d..42d2d483cc29 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml
@@ -57,6 +57,7 @@ properties:
clocks:
items:
- description: SPLIT Clock
+ maxItems: 3
required:
- compatible
--
2.45.2
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