linux-kernel - Re: [PATCH v9 2/6] spi: spi-mem: Allow specifying the byte order in Octal DTR mode

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Message-ID: <ZvKkhPf3gCYpqQF2@finisterre.sirena.org.uk>
Date: Tue, 24 Sep 2024 13:37:40 +0200
From: Mark Brown <broonie@...nel.org>
To: AlvinZhou <alvinzhou.tw@...il.com>
Cc: linux-mtd@...ts.infradead.org, linux-spi@...r.kernel.org,
	linux-kernel@...r.kernel.org, tudor.ambarus@...aro.org,
	pratyush@...nel.org, mwalle@...nel.org, miquel.raynal@...tlin.com,
	richard@....at, vigneshr@...com, chengminglin@...c.com.tw,
	leoyu@...c.com.tw, AlvinZhou <alvinzhou@...c.com.tw>,
	JaimeLiao <jaimeliao@...c.com.tw>
Subject: Re: [PATCH v9 2/6] spi: spi-mem: Allow specifying the byte order in
 Octal DTR mode

On Thu, Jul 18, 2024 at 11:46:10AM +0800, AlvinZhou wrote:
> From: AlvinZhou <alvinzhou@...c.com.tw>
> 
> From: Tudor Ambarus <tudor.ambarus@...aro.org>
> 
> There are NOR flashes (Macronix) that swap the bytes on a 16-bit
> boundary when configured in Octal DTR mode. The byte order of
> 16-bit words is swapped when read or written in Octal Double
> Transfer Rate (DTR) mode compared to Single Transfer Rate (STR)
> modes. If one writes D0 D1 D2 D3 bytes using 1-1-1 mode, and uses

Acked-by: Mark Brown <broonie@...nel.org>

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