linux-kernel - Re: [PATCH v3 1/2] riscv: process: Introduce idle thread using Zawrs extension

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Message-ID: <mvmbk0b7rjz.fsf@suse.de>
Date: Wed, 25 Sep 2024 16:10:08 +0200
From: Andreas Schwab <schwab@...e.de>
To: Andrew Jones <ajones@...tanamicro.com>
Cc: Xu Lu <luxu.kernel@...edance.com>,  paul.walmsley@...ive.com,
  palmer@...belt.com,  aou@...s.berkeley.edu,  andy.chiu@...ive.com,
  guoren@...nel.org,  christoph.muellner@...ll.eu,
  linux-riscv@...ts.infradead.org,  linux-kernel@...r.kernel.org,
  lihangjing@...edance.com,  dengliang.1214@...edance.com,
  xieyongji@...edance.com,  chaiwen.cc@...edance.com
Subject: Re: [PATCH v3 1/2] riscv: process: Introduce idle thread using
 Zawrs extension

On Sep 25 2024, Andrew Jones wrote:

> On Wed, Sep 25, 2024 at 09:15:46PM GMT, Xu Lu wrote:
>> @@ -148,6 +149,21 @@ static inline void wait_for_interrupt(void)
>>  	__asm__ __volatile__ ("wfi");
>>  }
>>  
>> +static inline void wrs_nto(unsigned long *addr)
>> +{
>> +	int val;
>> +
>> +	__asm__ __volatile__(
>> +#ifdef CONFIG_64BIT
>> +			"lr.d %[p], %[v]\n\t"
>> +#else
>> +			"lr.w %[p], %[v]\n\t"
>> +#endif
>
> val is always 32-bit since it's an int. We should always use lr.w.

Shouldn't val be unsigned long like the pointer that is being read?

-- 
Andreas Schwab, SUSE Labs, schwab@...e.de
GPG Key fingerprint = 0196 BAD8 1CE9 1970 F4BE  1748 E4D4 88E3 0EEA B9D7
"And now for something completely different."