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Message-ID: <70ec8bc4-5a7f-4283-892e-e8c3543a0ad2@zytor.com>
Date: Tue, 24 Sep 2024 20:33:16 -0700
From: Xin Li <xin@...or.com>
To: Rik van Riel <riel@...riel.com>, Thomas Gleixner <tglx@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>, linux-kernel@...r.kernel.org,
        kernel-team@...a.com
Subject: Re: [PATCH] x86,cpu: add X86_FEATURE_INVLPGB flag

On 9/24/2024 3:00 PM, Rik van Riel wrote:
> Add the definition for the X86_FEATURE_INVLPGB CPUID flag.
> 
> Tested by booting a kernel with this change on an AMD Milan system,
> and making sure the "invlpgb" flag shows up in /proc/cpuinfo
> 
> Signed-off-by: Rik van Riel <riel@...riel.com>

Now there is a need to also update the CPUID database:

https://lore.kernel.org/lkml/87o7642u7w.ffs@tglx/

Thanks!
     Xin

> ---
>   arch/x86/include/asm/cpufeatures.h | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index dd4682857c12..9a98cc7ded39 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -335,6 +335,7 @@
>   #define X86_FEATURE_CLZERO		(13*32+ 0) /* "clzero" CLZERO instruction */
>   #define X86_FEATURE_IRPERF		(13*32+ 1) /* "irperf" Instructions Retired Count */
>   #define X86_FEATURE_XSAVEERPTR		(13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
> +#define X86_FEATURE_INVLPGB		(13*32+ 3) /* "invlpgb" INVLPGB instruction */
>   #define X86_FEATURE_RDPRU		(13*32+ 4) /* "rdpru" Read processor register at user level */
>   #define X86_FEATURE_WBNOINVD		(13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
>   #define X86_FEATURE_AMD_IBPB		(13*32+12) /* Indirect Branch Prediction Barrier */


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