[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240925-ti-cpufreq-fixes-v5-v6-6-46f41a903e01@ti.com>
Date: Wed, 25 Sep 2024 20:24:20 +0530
From: Dhruva Gole <d-gole@...com>
To: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
Tero
Kristo <kristo@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof
Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
"Rafael
J. Wysocki" <rafael@...nel.org>,
Viresh Kumar <viresh.kumar@...aro.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
Andrew Davis
<afd@...com>, Bryan Brattlof <bb@...com>,
Dhruva Gole <d-gole@...com>
Subject: [PATCH v6 6/6] cpufreq: ti-cpufreq: Update efuse/rev offsets in
AM62 family
With the Silicon revision being taken directly from socinfo, there's no
longer any need for reading any SOC register for revision from this driver.
Hence, we do not require any rev_offset for AM62 family of devices.
The efuse offset should be 0x0 for AM625 as well, as the syscon
register being used from DT refers to the efuse_offset directly.
However, to maintain the backward compatibility with old devicetree, also
add condition to handle the case where we have the wrong offset and add
the older efuse_offset value there such that we don't end up reading the
wrong register offset.
Signed-off-by: Dhruva Gole <d-gole@...com>
---
drivers/cpufreq/ti-cpufreq.c | 23 +++++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c
index ba621ce1cdda694c98867422dbb7f10c0df2afef..8a97b95b4c44a76b12cab76ddc0f9a5b8ae73f84 100644
--- a/drivers/cpufreq/ti-cpufreq.c
+++ b/drivers/cpufreq/ti-cpufreq.c
@@ -313,10 +313,9 @@ static const struct soc_device_attribute k3_cpufreq_soc[] = {
static struct ti_cpufreq_soc_data am625_soc_data = {
.efuse_xlate = am625_efuse_xlate,
- .efuse_offset = 0x0018,
+ .efuse_offset = 0x0,
.efuse_mask = 0x07c0,
.efuse_shift = 0x6,
- .rev_offset = 0x0014,
.multi_regulator = false,
};
@@ -325,7 +324,6 @@ static struct ti_cpufreq_soc_data am62a7_soc_data = {
.efuse_offset = 0x0,
.efuse_mask = 0x07c0,
.efuse_shift = 0x6,
- .rev_offset = 0x0014,
.multi_regulator = false,
};
@@ -334,7 +332,6 @@ static struct ti_cpufreq_soc_data am62p5_soc_data = {
.efuse_offset = 0x0,
.efuse_mask = 0x07c0,
.efuse_shift = 0x6,
- .rev_offset = 0x0014,
.multi_regulator = false,
};
@@ -349,11 +346,25 @@ static int ti_cpufreq_get_efuse(struct ti_cpufreq_data *opp_data,
u32 *efuse_value)
{
struct device *dev = opp_data->cpu_dev;
+ struct device_node *np = opp_data->opp_node;
u32 efuse;
int ret;
- ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
- &efuse);
+ /*
+ * The following check is used as a way to check if this is an older devicetree
+ * being used where the entire wkup_conf node was marked as "syscon",
+ * "simple-mfd".
+ * Since this bug only affects AM625, make sure it enters this condition
+ * only for that SoC.
+ */
+ if (of_device_is_compatible(np, "simple-mfd") &&
+ of_device_is_compatible(np, "ti,am625")) {
+ ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset + 0x0018,
+ &efuse);
+ } else {
+ ret = regmap_read(opp_data->syscon, opp_data->soc_data->efuse_offset,
+ &efuse);
+ }
if (opp_data->soc_data->quirks & TI_QUIRK_SYSCON_MAY_BE_MISSING && ret == -EIO) {
/* not a syscon register! */
void __iomem *regs = ioremap(OMAP3_SYSCON_BASE +
--
2.34.1
Powered by blists - more mailing lists