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Message-ID: <dd16ff25-8f05-4137-9726-7f63ab82f30a@quicinc.com>
Date: Wed, 25 Sep 2024 11:40:26 +0800
From: Qiang Yu <quic_qianyu@...cinc.com>
To: Johan Hovold <johan@...nel.org>
CC: <manivannan.sadhasivam@...aro.org>, <vkoul@...nel.org>,
<kishon@...nel.org>, <robh@...nel.org>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<mturquette@...libre.com>, <sboyd@...nel.org>, <abel.vesa@...aro.org>,
<quic_msarkar@...cinc.com>, <quic_devipriy@...cinc.com>,
<dmitry.baryshkov@...aro.org>, <kw@...ux.com>, <lpieralisi@...nel.org>,
<neil.armstrong@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>, Mike Tipton <quic_mdtipton@...cinc.com>
Subject: Re: [PATCH v4 4/6] clk: qcom: gcc-x1e80100: Fix halt_check for
pipediv2 clocks
On 9/24/2024 10:31 PM, Johan Hovold wrote:
> On Tue, Sep 24, 2024 at 03:14:42AM -0700, Qiang Yu wrote:
>> The pipediv2_clk's source from the same mux as pipe clock. So they have
>> same limitation, which is that the PHY sequence requires to enable these
>> local CBCs before the PHY is actually outputting a clock to them. This
>> means the clock won't actually turn on when we vote them. Hence, let's
>> skip the halt bit check of the pipediv2_clk, otherwise pipediv2_clk may
>> stuck at off state during bootup.
>>
>> Suggested-by: Mike Tipton <quic_mdtipton@...cinc.com>
>> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
>> Reviewed-by: Konrad Dybcio <konradybcio@...nel.org>
> Looks like this one is missing a Fixes and CC stable tag. With that
> added:
Will add Fixes and CC stable tag.
Thanks,
Qiang Yu
> Reviewed-by: Johan Hovold <johan+linaro@...nel.org>
>
> Johan
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