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Message-ID: <rpu2o2vw6jqbuywabaxaqepathkqlzjzjvn7j6h5lq6zslitu4@icj5hpmwo6kr>
Date: Wed, 25 Sep 2024 22:19:06 +0200
From: Andi Shyti <andi.shyti@...nel.org>
To: warp5tw@...il.com
Cc: avifishman70@...il.com, tmaimon77@...il.com, tali.perry1@...il.com, 
	venture@...gle.com, yuenn@...gle.com, benjaminfair@...gle.com, 
	andriy.shevchenko@...ux.intel.com, wsa@...nel.org, rand.sec96@...il.com, 
	wsa+renesas@...g-engineering.com, tali.perry@...oton.com, Avi.Fishman@...oton.com, 
	tomer.maimon@...oton.com, KWLIU@...oton.com, JJLIU0@...oton.com, kfting@...oton.com, 
	openbmc@...ts.ozlabs.org, linux-i2c@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 1/6] i2c: npcm: correct the read/write operation
 procedure

Hi Tyrone,

On Fri, Sep 20, 2024 at 06:18:15PM GMT, warp5tw@...il.com wrote:
> From: Tyrone Ting <kfting@...oton.com>
> 
> From: Tyrone Ting <kfting@...oton.com>

no worries, I can take care of this.

> Originally the driver uses the XMIT bit in SMBnST register to decide
> the upcoming i2c transaction. If XMIT bit is 1, then it will be an i2c
> write operation. If it's 0, then a read operation will be executed.
> 
> In slave mode the XMIT bit can simply be used directly to set the state.
> XMIT bit can be used as an indication to the current state of the state
> machine during slave operation. (meaning XMIT = 1 during writing and
> XMIT = 0 during reading).
> 
> In master operation XMIT is valid only if there are no bus errors.
> For example: in a multi master where the same module is switching from
> master to slave at runtime, and there are collisions, the XMIT bit
> cannot be trusted.
> 
> However the maser already "knows" what the bus state is, so this bit
> is not needed and the driver can just track what it is currently doing.
> 
> Signed-off-by: Tyrone Ting <kfting@...oton.com>
> Reviewed-by: Tali Perry <tali.perry1@...il.com>

This patch is independent from the rest of the series, can I
start takin this in and unburden you from this?

Andi

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