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Message-ID: <4d812be2-5dfc-4e33-bbd1-bf1ae3601991@quicinc.com>
Date: Wed, 25 Sep 2024 12:00:07 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <ulf.hansson@...aro.org>, <linus.walleij@...aro.org>,
        <catalin.marinas@....com>, <p.zabel@...gutronix.de>,
        <geert+renesas@...der.be>, <dmitry.baryshkov@...aro.org>,
        <neil.armstrong@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-mmc@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
CC: <quic_varada@...cinc.com>
Subject: Re: [PATCH 1/8] dt-bindings: clock: Add Qualcomm IPQ5424 GCC



On 9/25/2024 12:08 AM, Krzysztof Kozlowski wrote:
> On 24/09/2024 14:10, Sricharan Ramabadhran wrote:
>>
>>
>> On 9/20/2024 6:14 PM, Krzysztof Kozlowski wrote:
>>> On 20/09/2024 13:56, Sricharan Ramabadhran wrote:
>>>>
>>>>>> +
>>>>>> +allOf:
>>>>>> +  - $ref: qcom,gcc.yaml#
>>>>>> +
>>>>>> +properties:
>>>>>> +  compatible:
>>>>>> +    const: qcom,ipq5424-gcc
>>>>>
>>>>> So everything i sthe same as 5332? Why not adding it there?
>>>>>
>>>> infact, ipq5332 has 1 dual lane and 1 single lane pcie, whereas
>>>> ipq5424 has 2 dual lane and 2 single lane pcie. will update the
>>>> bindings in v2 accordingly.
>>>
>>> Hm? What is the difference in the bindings? I don't see. Maybe some diff
>>> would help.
>>>
>>
>> For IPQ5424, clocks items is like this
>>
>>         - description: Board XO clock source
>>         - description: Sleep clock source
>>         - description: PCIE 2lane PHY0 pipe clock source
>>         - description: PCIE 2lane PHY1 pipe clock source
>>         - description: PCIE 2lane PHY2 pipe clock source
>>         - description: PCIE 2lane PHY3 pipe clock source
>>         - description: USB PCIE wrapper pipe clock source
> 
> But that's not true. Open your patch and look:
> 
> +  clocks:
> +    items:
> +      - description: Board XO clock source
> +      - description: Sleep clock source
> +      - description: PCIE 2lane PHY pipe clock source
> +      - description: PCIE 2lane x1 PHY pipe clock source (For second lane)
> +      - description: USB PCIE wrapper pipe clock source
> 
> Either you sent incomplete binding or we talk about different things.
Sorry for the confusion, the 2 additional PHY bindings needs to be
appended here, as well as to DTS. Will add that.

> Looks like first case, so the binding is just not ready. I am not going
> to review it.

Sorry yeah, i missed the 2 instances in V1. In that case, would it be
fine to go with the approach of adding the compatible to 
ipq5332-gcc.yaml with a 'if:' of compatibles ?


Regards,
  Sricharan


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