[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240925080522.qwjeyrpjtz64pccx@thinkpad>
Date: Wed, 25 Sep 2024 10:05:22 +0200
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Konrad Dybcio <konradybcio@...nel.org>
Cc: Qiang Yu <quic_qianyu@...cinc.com>, vkoul@...nel.org, kishon@...nel.org,
robh@...nel.org, andersson@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, mturquette@...libre.com, sboyd@...nel.org,
abel.vesa@...aro.org, quic_msarkar@...cinc.com,
quic_devipriy@...cinc.com, dmitry.baryshkov@...aro.org,
kw@...ux.com, lpieralisi@...nel.org, neil.armstrong@...aro.org,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 6/6] arm64: dts: qcom: x1e80100: Add support for PCIe3
on x1e80100
On Tue, Sep 24, 2024 at 04:26:34PM +0200, Konrad Dybcio wrote:
> On 24.09.2024 12:14 PM, Qiang Yu wrote:
> > Describe PCIe3 controller and PHY. Also add required system resources like
> > regulators, clocks, interrupts and registers configuration for PCIe3.
> >
> > Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> > ---
>
> Qiang, Mani
>
> I have a RTS5261 mmc chip on PCIe3 on the Surface Laptop.
Is it based on x1e80100?
> Adding the global irq breaks sdcard detection (the chip still comes
> up fine) somehow. Removing the irq makes it work again :|
>
> I've confirmed that the irq number is correct
>
Yeah, I did see some issues with MSI on SM8250 (RB5) when global interrupts are
enabled and I'm working with the hw folks to understand what is going on. But
I didn't see the same issues on newer platforms (sa8775p etc...).
Can you please confirm if the issue is due to MSI not being received from the
device? Checking the /proc/interrutps is enough.
- Mani
--
மணிவண்ணன் சதாசிவம்
Powered by blists - more mailing lists