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Message-ID: <e989c40b-e104-469b-84c1-f6c8e59ccfba@quicinc.com>
Date: Wed, 25 Sep 2024 15:33:12 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: Mukesh Kumar Savaliya <quic_msavaliy@...cinc.com>, <andi.shyti@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: Re: [PATCH 1/1] i2c: qcom-geni: add 32MHz I2C SE clock support for
 IPQ5424



On 9/25/2024 3:25 PM, Mukesh Kumar Savaliya wrote:
> Thanks manikanta !
> 
> On 9/25/2024 2:14 PM, Manikanta Mylavarapu wrote:
>>
>>
>> On 9/25/2024 1:06 PM, Mukesh Kumar Savaliya wrote:
>>> Hi Manikanta,
>>>
>>> On 9/24/2024 12:20 PM, Manikanta Mylavarapu wrote:
>>>> The IPQ5424 I2C SE clock operates at a frequency of 32MHz. Since the
>>> would it be better to say , I2C SE is sourced from 32MHZ ?
>>
>> Okay, sure.
>>
>>>> existing map table is based on 19.2MHz, this patch incorporate the
>>> based on 19.2MHz. this patch /,/.
>>
>> Okay, sure.
>>
>>>> clock map table to derive the SCL clock from the 32MHz SE clock.
>>> from the 32MHz Source Clock frequency.
>>> SE = Expand ORĀ  (I2C Serial Engine Controller)
>>
>> Okay, sure.
>>
> Please also mention the reason why 32MHz got added ? Need to describe evolution to understand the purpose behind this change.

Okay, sure.

Thanks & Regards,
Manikanta.

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