linux-kernel - Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240926084222.48042652@fedora.home>
Date: Thu, 26 Sep 2024 08:42:22 +0200
From: Maxime Chevallier <maxime.chevallier@...tlin.com>
To: Abhishek Chauhan <quic_abchauha@...cinc.com>
Cc: "David S. Miller" <davem@...emloft.net>, Eric Dumazet
 <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni
 <pabeni@...hat.com>, netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
 Andrew Halaney <ahalaney@...hat.com>, "Russell King (Oracle)"
 <linux@...linux.org.uk>, Andrew Lunn <andrew@...n.ch>, Heiner Kallweit
 <hkallweit1@...il.com>, Bartosz Golaszewski
 <bartosz.golaszewski@...aro.org>, "linux-tegra@...r.kernel.org"
 <linux-tegra@...r.kernel.org>, Brad Griffis <bgriffis@...dia.com>, Vladimir
 Oltean <vladimir.oltean@....com>, Jon Hunter <jonathanh@...dia.com>,
 Przemek Kitszel <przemyslaw.kitszel@...el.com>, kernel@...cinc.com
Subject: Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA
 capabilities

Hello,

On Wed, 25 Sep 2024 16:01:28 -0700
Abhishek Chauhan <quic_abchauha@...cinc.com> wrote:

> AQR115c reports incorrect PMA capabilities which includes
> 10G/5G and also incorrectly disables capabilities like autoneg
> and 10Mbps support.
> 
> AQR115c as per the Marvell databook supports speeds up to 2.5Gbps
> with autonegotiation.
> 
> Fixes: 0ebc581f8a4b ("net: phy: aquantia: add support for aqr115c")
> Link: https://lore.kernel.org/all/20240913011635.1286027-1-quic_abchauha@quicinc.com/T/
> Signed-off-by: Abhishek Chauhan <quic_abchauha@...cinc.com>
> ---

[...]

>  
> +static int aqr115c_get_features(struct phy_device *phydev)
> +{
> +	int ret;
> +	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
> +
> +	/* Normal feature discovery */
> +	ret = genphy_c45_pma_read_abilities(phydev);
> +	if (ret)
> +		return ret;
> +
> +	/* PHY FIXUP */
> +	/* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */
> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported);
> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported);
> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported);
> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported);
> +
> +	/* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */
> +	linkmode_copy(supported, phy_gbit_features);
> +	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported);

I still think you shouldn't report 2500BaseX, as you mentionned
it's a BaseT PHY. This is independent of the modes that the PHY uses to
connect to the MAC. Although the PHY can talk to the MAC using
2500BaseX on its MII interface, it looks like it can't use
2500BaseX on its MDI (the LP side of the PHY). There's the same issue in
patch 2.

Thanks,

Maxime