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Message-Id: <20240926065422.226518-3-nick.hu@sifive.com>
Date: Thu, 26 Sep 2024 14:54:17 +0800
From: Nick Hu <nick.hu@...ive.com>
To: greentime.hu@...ive.com,
zong.li@...ive.com,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Pavel Machek <pavel@....cz>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>,
Anup Patel <anup@...infault.org>,
Andrew Jones <ajones@...tanamicro.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Mayuresh Chitale <mchitale@...tanamicro.com>,
Atish Patra <atishp@...osinc.com>,
Samuel Holland <samuel.holland@...ive.com>,
Samuel Ortiz <sameo@...osinc.com>,
Nick Hu <nick.hu@...ive.com>,
Sunil V L <sunilvl@...tanamicro.com>,
linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org
Subject: [PATCH v2 2/3] riscv: Add stimecmp save and restore
If the HW support the SSTC extension, we should save and restore the
stimecmp register while cpu non retention suspend.
Signed-off-by: Nick Hu <nick.hu@...ive.com>
---
arch/riscv/include/asm/suspend.h | 1 +
arch/riscv/kernel/suspend.c | 6 ++++++
2 files changed, 7 insertions(+)
diff --git a/arch/riscv/include/asm/suspend.h b/arch/riscv/include/asm/suspend.h
index 4ffb022b097f..4dfdb7134d0e 100644
--- a/arch/riscv/include/asm/suspend.h
+++ b/arch/riscv/include/asm/suspend.h
@@ -18,6 +18,7 @@ struct suspend_context {
unsigned long ie;
#ifdef CONFIG_MMU
unsigned long satp;
+ u64 stimecmp;
#endif
};
diff --git a/arch/riscv/kernel/suspend.c b/arch/riscv/kernel/suspend.c
index c8cec0cc5833..5d9036ea6784 100644
--- a/arch/riscv/kernel/suspend.c
+++ b/arch/riscv/kernel/suspend.c
@@ -30,6 +30,9 @@ void suspend_save_csrs(struct suspend_context *context)
*/
#ifdef CONFIG_MMU
+ if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC))
+ context->stimecmp = csr_read_hi_lo(CSR_STIMECMP);
+
context->satp = csr_read(CSR_SATP);
#endif
}
@@ -43,6 +46,9 @@ void suspend_restore_csrs(struct suspend_context *context)
csr_write(CSR_IE, context->ie);
#ifdef CONFIG_MMU
+ if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC))
+ csr_write_hi_lo(CSR_STIMECMP, context->stimecmp);
+
csr_write(CSR_SATP, context->satp);
#endif
}
--
2.34.1
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