| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <8653f4f97da4ec5033d93485339ac3d56b8bb3f1.camel@mediatek.com>
Date: Thu, 26 Sep 2024 09:34:13 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
"alpernebiyasak@...il.com" <alpernebiyasak@...il.com>,
"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>, "AngeloGioacchino Del
Regno" <angelogioacchino.delregno@...labora.com>
CC: "linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Singo Chang (張興國) <Singo.Chang@...iatek.com>,
Shawn Sung (宋孝謙) <Shawn.Sung@...iatek.com>,
Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v6 2/2] drm/mediatek: Add blend_modes to mtk_plane_init()
for different SoCs
Hi, Jason:
On Thu, 2024-09-26 at 16:35 +0800, Jason-JH.Lin wrote:
> Since some SoCs support premultiplied pixel formats but some do not,
> the blend_modes parameter is added to mtk_plane_init(), which is
> obtained from the mtk_ddp_comp_get_blend_modes function implemented
> in different blending supported components.
>
> The blending supported components can use driver data to set the
> blend mode capabilities for different SoCs.
Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> Signed-off-by: Jason-JH.Lin <jason-jh.lin@...iatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_crtc.c | 1 +
> drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 2 ++
> drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 10 ++++++++++
> drivers/gpu/drm/mediatek/mtk_disp_drv.h | 2 ++
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 7 +++++++
> drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 7 +++++++
> drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 +++++++
> drivers/gpu/drm/mediatek/mtk_ethdr.h | 1 +
> drivers/gpu/drm/mediatek/mtk_plane.c | 15 +++++++--------
> drivers/gpu/drm/mediatek/mtk_plane.h | 4 ++--
> 10 files changed, 46 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_crtc.c b/drivers/gpu/drm/mediatek/mtk_crtc.c
> index 175b00e5a253..b65f196f2015 100644
> --- a/drivers/gpu/drm/mediatek/mtk_crtc.c
> +++ b/drivers/gpu/drm/mediatek/mtk_crtc.c
> @@ -913,6 +913,7 @@ static int mtk_crtc_init_comp_planes(struct drm_device *drm_dev,
> BIT(pipe),
> mtk_crtc_plane_type(mtk_crtc->layer_nr, num_planes),
> mtk_ddp_comp_supported_rotations(comp),
> + mtk_ddp_comp_get_blend_modes(comp),
> mtk_ddp_comp_get_formats(comp),
> mtk_ddp_comp_get_num_formats(comp), i);
> if (ret)
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index be66d94be361..edc6417639e6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -363,6 +363,7 @@ static const struct mtk_ddp_comp_funcs ddp_ovl = {
> .layer_config = mtk_ovl_layer_config,
> .bgclr_in_on = mtk_ovl_bgclr_in_on,
> .bgclr_in_off = mtk_ovl_bgclr_in_off,
> + .get_blend_modes = mtk_ovl_get_blend_modes,
> .get_formats = mtk_ovl_get_formats,
> .get_num_formats = mtk_ovl_get_num_formats,
> };
> @@ -416,6 +417,7 @@ static const struct mtk_ddp_comp_funcs ddp_ovl_adaptor = {
> .disconnect = mtk_ovl_adaptor_disconnect,
> .add = mtk_ovl_adaptor_add_comp,
> .remove = mtk_ovl_adaptor_remove_comp,
> + .get_blend_modes = mtk_ovl_adaptor_get_blend_modes,
> .get_formats = mtk_ovl_adaptor_get_formats,
> .get_num_formats = mtk_ovl_adaptor_get_num_formats,
> .mode_valid = mtk_ovl_adaptor_mode_valid,
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> index ecf6dc283cd7..79562af1180f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> @@ -80,6 +80,7 @@ struct mtk_ddp_comp_funcs {
> void (*ctm_set)(struct device *dev,
> struct drm_crtc_state *state);
> struct device * (*dma_dev_get)(struct device *dev);
> + const u32 (*get_blend_modes)(struct device *dev);
> const u32 *(*get_formats)(struct device *dev);
> size_t (*get_num_formats)(struct device *dev);
> void (*connect)(struct device *dev, struct device *mmsys_dev, unsigned int next);
> @@ -266,6 +267,15 @@ static inline struct device *mtk_ddp_comp_dma_dev_get(struct mtk_ddp_comp *comp)
> return comp->dev;
> }
>
> +static inline
> +const u32 mtk_ddp_comp_get_blend_modes(struct mtk_ddp_comp *comp)
> +{
> + if (comp->funcs && comp->funcs->get_blend_modes)
> + return comp->funcs->get_blend_modes(comp->dev);
> +
> + return 0;
> +}
> +
> static inline
> const u32 *mtk_ddp_comp_get_formats(struct mtk_ddp_comp *comp)
> {
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_drv.h b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> index 082ac18fe04a..defa500cd64f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_drv.h
> @@ -103,6 +103,7 @@ void mtk_ovl_register_vblank_cb(struct device *dev,
> void mtk_ovl_unregister_vblank_cb(struct device *dev);
> void mtk_ovl_enable_vblank(struct device *dev);
> void mtk_ovl_disable_vblank(struct device *dev);
> +const u32 mtk_ovl_get_blend_modes(struct device *dev);
> const u32 *mtk_ovl_get_formats(struct device *dev);
> size_t mtk_ovl_get_num_formats(struct device *dev);
>
> @@ -131,6 +132,7 @@ void mtk_ovl_adaptor_start(struct device *dev);
> void mtk_ovl_adaptor_stop(struct device *dev);
> unsigned int mtk_ovl_adaptor_layer_nr(struct device *dev);
> struct device *mtk_ovl_adaptor_dma_dev_get(struct device *dev);
> +const u32 mtk_ovl_adaptor_get_blend_modes(struct device *dev);
> const u32 *mtk_ovl_adaptor_get_formats(struct device *dev);
> size_t mtk_ovl_adaptor_get_num_formats(struct device *dev);
> enum drm_mode_status mtk_ovl_adaptor_mode_valid(struct device *dev,
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index 0cf7b80f612e..8592c6078bb1 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -215,6 +215,13 @@ void mtk_ovl_disable_vblank(struct device *dev)
> writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
> }
>
> +const u32 mtk_ovl_get_blend_modes(struct device *dev)
> +{
> + struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> +
> + return ovl->data->blend_modes;
> +}
> +
> const u32 *mtk_ovl_get_formats(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> index c6768210b08b..93dc9c200705 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> @@ -400,6 +400,13 @@ void mtk_ovl_adaptor_disable_vblank(struct device *dev)
> mtk_ethdr_disable_vblank(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]);
> }
>
> +const u32 mtk_ovl_adaptor_get_blend_modes(struct device *dev)
> +{
> + struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
> +
> + return mtk_ethdr_get_blend_modes(ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]);
> +}
> +
> const u32 *mtk_ovl_adaptor_get_formats(struct device *dev)
> {
> struct mtk_disp_ovl_adaptor *ovl_adaptor = dev_get_drvdata(dev);
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> index d1d9cf8b10e1..5532740e17ba 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
> @@ -145,6 +145,13 @@ static irqreturn_t mtk_ethdr_irq_handler(int irq, void *dev_id)
> return IRQ_HANDLED;
> }
>
> +const u32 mtk_ethdr_get_blend_modes(struct device *dev)
> +{
> + return BIT(DRM_MODE_BLEND_PREMULTI) |
> + BIT(DRM_MODE_BLEND_COVERAGE) |
> + BIT(DRM_MODE_BLEND_PIXEL_NONE);
> +}
> +
> void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> struct mtk_plane_state *state,
> struct cmdq_pkt *cmdq_pkt)
> diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.h b/drivers/gpu/drm/mediatek/mtk_ethdr.h
> index 81af9edea3f7..c2c7d56fb429 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ethdr.h
> +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.h
> @@ -13,6 +13,7 @@ void mtk_ethdr_clk_disable(struct device *dev);
> void mtk_ethdr_config(struct device *dev, unsigned int w,
> unsigned int h, unsigned int vrefresh,
> unsigned int bpc, struct cmdq_pkt *cmdq_pkt);
> +const u32 mtk_ethdr_get_blend_modes(struct device *dev);
> void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
> struct mtk_plane_state *state,
> struct cmdq_pkt *cmdq_pkt);
> diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c
> index 7d2cb4e0fafa..8a48b3b0a956 100644
> --- a/drivers/gpu/drm/mediatek/mtk_plane.c
> +++ b/drivers/gpu/drm/mediatek/mtk_plane.c
> @@ -320,8 +320,8 @@ static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
>
> int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
> unsigned long possible_crtcs, enum drm_plane_type type,
> - unsigned int supported_rotations, const u32 *formats,
> - size_t num_formats, unsigned int plane_idx)
> + unsigned int supported_rotations, const u32 blend_modes,
> + const u32 *formats, size_t num_formats, unsigned int plane_idx)
> {
> int err;
>
> @@ -366,12 +366,11 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
> if (err)
> DRM_ERROR("failed to create property: alpha\n");
>
> - err = drm_plane_create_blend_mode_property(plane,
> - BIT(DRM_MODE_BLEND_PREMULTI) |
> - BIT(DRM_MODE_BLEND_COVERAGE) |
> - BIT(DRM_MODE_BLEND_PIXEL_NONE));
> - if (err)
> - DRM_ERROR("failed to create property: blend_mode\n");
> + if (blend_modes) {
> + err = drm_plane_create_blend_mode_property(plane, blend_modes);
> + if (err)
> + DRM_ERROR("failed to create property: blend_mode\n");
> + }
>
> drm_plane_helper_add(plane, &mtk_plane_helper_funcs);
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_plane.h b/drivers/gpu/drm/mediatek/mtk_plane.h
> index 5b177eac67b7..3b13b89989c7 100644
> --- a/drivers/gpu/drm/mediatek/mtk_plane.h
> +++ b/drivers/gpu/drm/mediatek/mtk_plane.h
> @@ -48,6 +48,6 @@ to_mtk_plane_state(struct drm_plane_state *state)
>
> int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane,
> unsigned long possible_crtcs, enum drm_plane_type type,
> - unsigned int supported_rotations, const u32 *formats,
> - size_t num_formats, unsigned int plane_idx);
> + unsigned int supported_rotations, const u32 blend_modes,
> + const u32 *formats, size_t num_formats, unsigned int plane_idx);
> #endif
Powered by blists - more mailing lists