| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20240617-starqltechn_integration_upstream-v5-1-761795ea5084@gmail.com> Date: Thu, 26 Sep 2024 13:38:15 +0300 From: Dzmitry Sankouski <dsankouski@...il.com> To: Bjorn Andersson <andersson@...nel.org>, Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org> Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org, Dzmitry Sankouski <dsankouski@...il.com> Subject: [PATCH v5 1/2] clk: qcom: clk-rcg2: document calc_rate function Update calc_rate docs to reflect, that pre_div is not pure divisor, but a register value, and requires conversion. Signed-off-by: Dzmitry Sankouski <dsankouski@...il.com> --- drivers/clk/qcom/clk-rcg2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index bf26c5448f00..0fc23a87b432 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -153,7 +153,14 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 index) * * parent_rate m * rate = ----------- x --- - * hid_div n + * pre_div n + * + * @param rate - Parent rate. + * @param m - Multiplier. + * @param n - Divisor. + * @param mode - Use zero to ignore m/n calculation. + * @param hid_div - Pre divisor register value. Pre divisor value + * relates to hid_div as pre_div = (hid_div + 1) / 2 */ static unsigned long calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) -- 2.39.2
Powered by blists - more mailing lists