linux-kernel - [PATCH v10 3/6] mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode

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Message-Id: <20240926141956.2386374-4-alvinzhou.tw@gmail.com>
Date: Thu, 26 Sep 2024 22:19:53 +0800
From: AlvinZhou <alvinzhou.tw@...il.com>
To: linux-mtd@...ts.infradead.org,
	linux-spi@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	tudor.ambarus@...aro.org,
	pratyush@...nel.org,
	mwalle@...nel.org,
	miquel.raynal@...tlin.com,
	richard@....at,
	vigneshr@...com,
	broonie@...nel.org
Cc: chengminglin@...c.com.tw,
	leoyu@...c.com.tw,
	AlvinZhou <alvinzhou@...c.com.tw>,
	JaimeLiao <jaimeliao@...c.com.tw>
Subject: [PATCH v10 3/6] mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode

From: AlvinZhou <alvinzhou@...c.com.tw>

From: Tudor Ambarus <tudor.ambarus@...aro.org>

Macronix swaps bytes on a 16-bit boundary when configured in Octal DTR.
The byte order of 16-bit words is swapped when read or written in 8D-8D-8D
mode compared to STR modes. Allow operations to specify the byte order in
DTR mode, so that controllers can swap the bytes back at run-time to
address the flash's endianness requirements, if they are capable. If the
controller is not capable of swapping the bytes, the protocol is downgrade
via spi_nor_spimem_adjust_hwcaps(). When available, the swapping of the
bytes is always done regardless if it's a data or register access, so that
it comply with the JESD216 requirements: "Byte order of 16-bit words is
swapped when read in 8D-8D-8D mode compared to 1-1-1".

Merge Tudor's patch and add modifications for suiting newer version
of Linux kernel.

Suggested-by: Michael Walle <mwalle@...nel.org>
Signed-off-by: Tudor Ambarus <tudor.ambarus@...aro.org>
Signed-off-by: JaimeLiao <jaimeliao@...c.com.tw>
Signed-off-by: AlvinZhou <alvinzhou@...c.com.tw>
---
 drivers/mtd/spi-nor/core.c | 4 ++++
 drivers/mtd/spi-nor/core.h | 1 +
 2 files changed, 5 insertions(+)

diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 028514c6996f..31f57b17023f 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -113,6 +113,10 @@ void spi_nor_spimem_setup_op(const struct spi_nor *nor,
 		op->cmd.opcode = (op->cmd.opcode << 8) | ext;
 		op->cmd.nbytes = 2;
 	}
+
+	/* SWAP16 is only applicable when Octal DTR mode */
+	if (proto == SNOR_PROTO_8_8_8_DTR && nor->flags & SNOR_F_SWAP16)
+		op->data.swap16 = true;
 }
 
 /**
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index 442786685515..baf6c4b5912b 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -140,6 +140,7 @@ enum spi_nor_option_flags {
 	SNOR_F_RWW		= BIT(14),
 	SNOR_F_ECC		= BIT(15),
 	SNOR_F_NO_WP		= BIT(16),
+	SNOR_F_SWAP16		= BIT(17),
 };
 
 struct spi_nor_read_command {
-- 
2.25.1