linux-kernel - Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA capabilities

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <6c6fae0b-2328-4427-83a3-3391c63e1e00@quicinc.com>
Date: Thu, 26 Sep 2024 17:19:31 -0700
From: "Abhishek Chauhan (ABC)" <quic_abchauha@...cinc.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
CC: "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet
	<edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni
	<pabeni@...hat.com>, <netdev@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Andrew Halaney <ahalaney@...hat.com>,
        "Andrew
 Lunn" <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "Bartosz
 Golaszewski" <bartosz.golaszewski@...aro.org>,
        "linux-tegra@...r.kernel.org"
	<linux-tegra@...r.kernel.org>,
        Brad Griffis <bgriffis@...dia.com>,
        "Vladimir
 Oltean" <vladimir.oltean@....com>,
        Jon Hunter <jonathanh@...dia.com>,
        "Maxime
 Chevallier" <maxime.chevallier@...tlin.com>,
        Przemek Kitszel
	<przemyslaw.kitszel@...el.com>, <kernel@...cinc.com>
Subject: Re: [PATCH net v3 1/2] net: phy: aquantia: AQR115c fix up PMA
 capabilities



On 9/26/2024 4:45 AM, Russell King (Oracle) wrote:
> On Wed, Sep 25, 2024 at 04:01:28PM -0700, Abhishek Chauhan wrote:
>> diff --git a/drivers/net/phy/aquantia/aquantia_main.c b/drivers/net/phy/aquantia/aquantia_main.c
>> index e982e9ce44a5..88ba12aaf6e0 100644
>> --- a/drivers/net/phy/aquantia/aquantia_main.c
>> +++ b/drivers/net/phy/aquantia/aquantia_main.c
>> @@ -767,6 +767,33 @@ static int aqr111_config_init(struct phy_device *phydev)
>>  	return aqr107_config_init(phydev);
>>  }
>>  
>> +static int aqr115c_get_features(struct phy_device *phydev)
>> +{
>> +	int ret;
>> +	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
> 
> Networking uses reverse-christmas tree ordering for variables. Please
> swap the order of these.
> 
> Also, I think this would be better:
> 
> 	unsigned long *supported = phydev->supported;
> 
> You don't actually need a separate mask.
> 
>> +
>> +	/* Normal feature discovery */
>> +	ret = genphy_c45_pma_read_abilities(phydev);
>> +	if (ret)
>> +		return ret;
>> +
>> +	/* PHY FIXUP */
>> +	/* Although the PHY sets bit 12.18.19.48, it does not support 5G/10G modes */
>> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->supported);
>> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, phydev->supported);
>> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, phydev->supported);
>> +	linkmode_clear_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, phydev->supported);
> 
> For the above four, s/phydev->supported/supported/
> 
>> +
>> +	/* Phy supports Speeds up to 2.5G with Autoneg though the phy PMA says otherwise */
>> +	linkmode_copy(supported, phy_gbit_features);
>> +	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, supported);
>> +	linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported);
>> +
>> +	linkmode_or(phydev->supported, supported, phydev->supported);
> 
> Drop this linkmode_or().
> 
> You'll then be modifying phydev->supported directly, which is totally
> fine.
Noted!.

Thanks Russell. Appreciate all the reviews. 


>