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Message-ID: <CAMuHMdVChqbMLN2vdc4iZ7iZ8+dz07k4pVOM_SfZarHWV93JqQ@mail.gmail.com>
Date: Fri, 27 Sep 2024 11:01:43 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Lizhi Hou <lizhi.hou@....com>
Cc: nishad.saraf@....com, vkoul@...nel.org, dmaengine@...r.kernel.org,
linux-kernel@...r.kernel.org, Nishad Saraf <nishads@....com>, sonal.santan@....com,
max.zhen@....com
Subject: Re: [PATCH V12 1/1] dmaengine: amd: qdma: Add AMD QDMA driver
Hi Lizhi,
On Tue, Sep 3, 2024 at 6:50 PM Lizhi Hou <lizhi.hou@....com> wrote:
> On 9/3/24 02:20, Geert Uytterhoeven wrote:
> > On Thu, Apr 18, 2024 at 7:51 PM Lizhi Hou <lizhi.hou@....com> wrote:
> >> From: Nishad Saraf <nishads@....com>
> >>
> >> Adds driver to enable PCIe board which uses AMD QDMA (the Queue-based
> >> Direct Memory Access) subsystem. For example, Xilinx Alveo V70 AI
> >> Accelerator devices.
> >> https://www.xilinx.com/applications/data-center/v70.html
> >>
> >> The QDMA subsystem is used in conjunction with the PCI Express IP block
> >> to provide high performance data transfer between host memory and the
> >> card's DMA subsystem.
> >>
> >> +-------+ +-------+ +-----------+
> >> PCIe | | | | | |
> >> Tx/Rx | | | | AXI | |
> >> <=======> | PCIE | <===> | QDMA | <====>| User Logic|
> >> | | | | | |
> >> +-------+ +-------+ +-----------+
> >>
> >> The primary mechanism to transfer data using the QDMA is for the QDMA
> >> engine to operate on instructions (descriptors) provided by the host
> >> operating system. Using the descriptors, the QDMA can move data in both
> >> the Host to Card (H2C) direction, or the Card to Host (C2H) direction.
> >> The QDMA provides a per-queue basis option whether DMA traffic goes
> >> to an AXI4 memory map (MM) interface or to an AXI4-Stream interface.
> >>
> >> The hardware detail is provided by
> >> https://docs.xilinx.com/r/en-US/pg302-qdma
> >>
> >> Implements dmaengine APIs to support MM DMA transfers.
> >> - probe the available DMA channels
> >> - use dma_slave_map for channel lookup
> >> - use virtual channel to manage dmaengine tx descriptors
> >> - implement device_prep_slave_sg callback to handle host scatter gather
> >> list
> >>
> >> Signed-off-by: Nishad Saraf <nishads@....com>
> >> Signed-off-by: Lizhi Hou <lizhi.hou@....com>
> > Thanks for your patch, which is now commit 73d5fc92a11cacb7
> > ("dmaengine: amd: qdma: Add AMD QDMA driver") in dmaengine/next.
> >
> >> --- /dev/null
> >> +++ b/drivers/dma/amd/Kconfig
> >> @@ -0,0 +1,14 @@
> >> +# SPDX-License-Identifier: GPL-2.0-only
> >> +
> >> +config AMD_QDMA
> >> + tristate "AMD Queue-based DMA"
> >> + depends on HAS_IOMEM
> > Any other subsystem or platform dependencies, to prevent asking the
> > user about this driver when configuring a kernel for a system which
> > cannot possibly have this hardware?
> > E.g. depends on PCI, or can this be used with other transports than PCIe?
>
> No, this driver does not have other dependencies. It can be used with
> other transports.
>
> It is similar with dmaengine/xilinx/xdma
OK.
> >> --- /dev/null
> >> +++ b/drivers/dma/amd/qdma/qdma-comm-regs.c
> >> +static struct platform_driver amd_qdma_driver = {
> >> + .driver = {
> >> + .name = "amd-qdma",
> > Which code is responsible for creating "amd-qdma" platform devices?
I still would like to receive an answer to this question?
Thanks!
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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