linux-kernel - Re: [PATCH 0/2] arm64: dts: renesas: Add SD/OE pin properties

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CAHCN7x+tcvih1-kmUs8tVLCAk0Gnj11t0yEZLPWk3UBNyad7Jg@mail.gmail.com>
Date: Fri, 27 Sep 2024 07:19:55 -0500
From: Adam Ford <aford173@...il.com>
To: Sean Anderson <sean.anderson@...ux.dev>
Cc: linux-arm-kernel@...ts.infradead.org, 
	Marian-Cristian Rotariu <marian-cristian.rotariu.rb@...renesas.com>, 
	Biju Das <biju.das@...renesas.com>, 
	Laurent Pinchart <laurent.pinchart@...asonboard.com>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Rob Herring <robh@...nel.org>, linux-renesas-soc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, 
	Conor Dooley <conor+dt@...nel.org>, Magnus Damm <magnus.damm@...il.com>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, Olof Johansson <olof@...om.net>, Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH 0/2] arm64: dts: renesas: Add SD/OE pin properties

On Thu, Sep 26, 2024 at 1:24 PM Sean Anderson <sean.anderson@...ux.dev> wrote:
>
> On 9/26/24 14:09, Sean Anderson wrote:
> > Linux can configure almost every part of this clock generator without
> > relying on the OTP settings. However, the correct configuration for the
> > SD/OE pin cannot be determined automatically. Therefore, add the
> > appropriate properties to configure this pin.
> >
> > I have CC'd some people who appear to have access to the following
> > boards which use the versaclock5:
> >
> > - Salvator-X
> > - HiHope RZ/G2[MN] Main Board
> > - Beacon Embedded Works RZ/G2N Development Kit
> >
> > as I could not find schematics for these boards. You can help me out by
> > (pick one):
> >
> > - Run the following command and send me the output:
> >
> >     $ grep 10: /sys/kernel/debug/regmap/*-006a/registers

Without any of the patches from this series, for the Beacon RZ/G2 Boards:

grep 10: /sys/kernel/debug/regmap/*-006a/registers
/sys/kernel/debug/regmap/2-006a/registers:10: a0
/sys/kernel/debug/regmap/4-006a/registers:10: a0

> >
> > - Measure the voltage on the SD/OE pin on a functioning board.
> > - Inspect (or send me) the schematic to determine the state of the SD/OE
> >   pin during normal operation.

The SD/OE pins on the Beacon boards are not tied high by default.
They have an optional pull-up resistor, but it is not populated by
default.

adam
> >
> > My suspicion is that all of these boards use the same configuration
> > (SD/OE pin tied high) owing to their common design heritage. Thanks in
> > advance.
>
> +CC the people I meant to CC in the first place