linux-kernel - Re: [PATCH 2/3] dt-bindings: fpga: Add Efinix serial SPI programming bindings

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Message-ID: <CAKrir7irvRbwCsdjF_NNfWy68wTDfRuyW2oHb90gYgBA=L7-Tg@mail.gmail.com>
Date: Fri, 27 Sep 2024 17:34:58 +0200
From: Ian Dannapel <iansdannapel@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: mdf@...nel.org, hao.wu@...el.com, yilun.xu@...el.com, trix@...hat.com, 
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, 
	neil.armstrong@...aro.org, heiko.stuebner@...rry.de, rafal@...ecki.pl, 
	linus.walleij@...aro.org, linux-fpga@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] dt-bindings: fpga: Add Efinix serial SPI programming bindings

Thanks for the review Krzysztof.

Am Fr., 27. Sept. 2024 um 16:26 Uhr schrieb Krzysztof Kozlowski
<krzk@...nel.org>:
>
> On 27/09/2024 16:14, iansdannapel@...il.com wrote:
> > From: Ian Dannapel <iansdannapel@...il.com>
> >
> > Add device tree binding documentation for configuring Efinix FPGA
> > using serial SPI passive programming mode.
> >
> > Signed-off-by: Ian Dannapel <iansdannapel@...il.com>
> > ---
> >  .../fpga/efinix,trion-spi-passive.yaml        | 85 +++++++++++++++++++
> >  1 file changed, 85 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml b/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml
> > new file mode 100644
> > index 000000000000..ec6697fa6f44
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/fpga/efinix,trion-spi-passive.yaml
> > @@ -0,0 +1,85 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/fpga/efinix,trion-spi-passive.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Efinix SPI FPGA Manager
> > +
> > +maintainers:
> > +  - Ian Dannapel <iansdannapel@...il.com>
> > +
> > +description: |
> > +  Efinix Trion and Titanium Series FPGAs support a method of loading the
> > +  bitstream over what is referred to as "SPI Passive Programming".
> > +  Only serial (1x bus width) is supported, setting the programming mode
> > +  is not in the scope the this manager and must be done elsewhere.
> > +
> > +  Warning: The slave serial link is not technically SPI and therefore it is
> > +  not recommended to have other devices on the same bus since it might
> > +  interfere or be interfered by other transmissions.
> > +
> > +  References:
> > +  - https://www.efinixinc.com/docs/an033-configuring-titanium-fpgas-v2.6.pdf
> > +  - https://www.efinixinc.com/docs/an006-configuring-trion-fpgas-v6.0.pdf
> > +
> > +allOf:
> > +  - $ref: /schemas/spi/spi-peripheral-props.yaml#
> > +
> > +properties:
> > +  compatible:
> > +    enum:
> > +      - efinix,trion-spi-passive
> > +      - efinix,titanium-spi-passive
>
> 1. Your driver suggests these are compatible, so make them compatible
> with using fallback.
>
> 2. What is "spi-passive"? Compatible is supposed to be the name of the
> device, so I assume this is "trion"? Can trion be anything else than fpga?
spi-passive is the programming mode, where the device is in slave
mode. There are also other modes, but not supported by this driver.
The name was inspired by similar drivers (spi-xilinx.c). Isn't just
"efinix,trion"/"efinix,titanium" too generic?
>
> > +
> > +  spi-cpha: true
> > +
> > +  spi-cpol: true
> > +
> > +  spi-max-frequency:
> > +    maximum: 25000000
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  creset-gpios:
>
> reset-gpios
>
> Do not invent own properties.
>
> > +    description:
> > +      reset and re-configuration trigger pin (low active)
> > +    maxItems: 1
> > +
> > +  cs-gpios:
> > +    description:
> > +      chip-select pin (low active)
>
> Eee? That's a property of controller, not child. Aren't you duplicating
> existing controller property?
This device uses this pin in combination with the reset to enter the
programming mode. Also, the driver must guarantee that the pin is
active for the whole transfer process, including ending dummy bits.
This is why I added a warning to NOT use this driver with other
devices on the same bus.
>
> > +    maxItems: 1
> > +
> > +  cdone-gpios:
> > +    description:
> > +      optional configuration done status pin (high active)
> > +    maxItems: 1
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - creset-gpios
> > +  - cs-gpios
> > +
> > +additionalProperties: false
>
> unevaluatedProperties instead
>
> > +
>
>
>
> Best regards,
> Krzysztof
>

Best regards,
Ian