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Message-Id: <20240927201313.624762-4-sean.anderson@linux.dev>
Date: Fri, 27 Sep 2024 16:13:13 -0400
From: Sean Anderson <sean.anderson@...ux.dev>
To: Arnd Bergmann <arnd@...db.de>,
Olof Johansson <olof@...om.net>,
linux-arm-kernel@...ts.infradead.org
Cc: linux-renesas-soc@...r.kernel.org,
Geert Uytterhoeven <geert+renesas@...der.be>,
Rob Herring <robh@...nel.org>,
devicetree@...r.kernel.org,
Magnus Damm <magnus.damm@...il.com>,
linux-kernel@...r.kernel.org,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Adam Ford <aford173@...il.com>,
Sean Anderson <sean.anderson@...ux.dev>
Subject: [PATCH 3/3] arm64: dts: renesas: beacon: Add SD/OE pin properties
Add SD/OE pin properties to the devicetree so that Linux can configure
the pin without relying on the OTP. This matches the register
configuration reported by Adam [1] as well as his analysis of the
schematic.
[1] https://lore.kernel.org/linux-arm-kernel/CAHCN7x+tcvih1-kmUs8tVLCAk0Gnj11t0yEZLPWk3UBNyad7Jg@mail.gmail.com/
Signed-off-by: Sean Anderson <sean.anderson@...ux.dev>
---
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi | 2 ++
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index 5a14f116f7a1..a258ba0d6b4f 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -364,6 +364,8 @@ versaclock6_bb: clock-controller@6a {
#clock-cells = <1>;
clocks = <&x304_clk>;
clock-names = "xin";
+ idt,shutdown = <0>;
+ idt,output-enable-active = <0>;
assigned-clocks = <&versaclock6_bb 1>, <&versaclock6_bb 2>,
<&versaclock6_bb 3>, <&versaclock6_bb 4>;
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
index 68b04e56ae56..06ad9db420d6 100644
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
@@ -166,6 +166,8 @@ versaclock5: versaclock_som@6a {
#clock-cells = <1>;
clocks = <&x304_clk>;
clock-names = "xin";
+ idt,shutdown = <0>;
+ idt,output-enable-active = <0>;
/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
assigned-clocks = <&versaclock5 1>,
<&versaclock5 2>,
--
2.35.1.1320.gc452695387.dirty
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