linux-kernel - Re: [PATCH v2 00/19] iommufd: Add VIOMMU infrastructure (Part-1)

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Message-ID: <d5fe4c4d-fde9-4d25-a580-0dae63c62ba9@intel.com>
Date: Sun, 29 Sep 2024 15:19:42 +0800
From: Yi Liu <yi.l.liu@...el.com>
To: Jason Gunthorpe <jgg@...dia.com>
CC: Nicolin Chen <nicolinc@...dia.com>, <kevin.tian@...el.com>,
	<will@...nel.org>, <joro@...tes.org>, <suravee.suthikulpanit@....com>,
	<robin.murphy@....com>, <dwmw2@...radead.org>, <baolu.lu@...ux.intel.com>,
	<shuah@...nel.org>, <linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kselftest@...r.kernel.org>,
	<eric.auger@...hat.com>, <jean-philippe@...aro.org>, <mdf@...nel.org>,
	<mshavit@...gle.com>, <shameerali.kolothum.thodi@...wei.com>,
	<smostafa@...gle.com>
Subject: Re: [PATCH v2 00/19] iommufd: Add VIOMMU infrastructure (Part-1)

On 2024/9/27 20:20, Jason Gunthorpe wrote:
> On Fri, Sep 27, 2024 at 08:12:20PM +0800, Yi Liu wrote:
>>> Perhaps calling it a slice sounds more accurate, as I guess all
>>> the confusion comes from the name "vIOMMU" that might be thought
>>> to be a user space object/instance that likely holds all virtual
>>> stuff like stage-1 HWPT or so?
>>
>> yeah. Maybe this confusion partly comes when you start it with the
>> cache invalidation as well. I failed to get why a S2 hwpt needs to
>> be part of the vIOMMU obj at the first glance.
> 
> Both amd and arm have direct to VM queues for the iommu and these
> queues have their DMA translated by the S2.

ok, this explains why the S2 should be part of the vIOMMU obj.

> 
> So their viommu HW concepts come along with a requirement that there
> be a fixed translation for the VM, which we model by attaching a S2
> HWPT to the VIOMMU object which get's linked into the IOMMU HW as
> the translation for the queue memory.

Is the mapping of the S2 be static? or it an be unmapped per userspace?

-- 
Regards,
Yi Liu