linux-kernel - [PATCH] KVM: arm64: vgic: fix GICR_STATUSR in vgic_v3_rd

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Message-ID: <20240929043937.242769-2-jiaqingtong97@gmail.com>
Date: Sun, 29 Sep 2024 12:39:35 +0800
From: jiaqingtong97@...il.com
To: Marc Zyngier <maz@...nel.org>,
	Oliver Upton <oliver.upton@...ux.dev>,
	James Morse <james.morse@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Zenghui Yu <yuzenghui@...wei.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Will Deacon <will@...nel.org>
Cc: Jia Qingtong <jiaqingtong@...wei.com>,
	linux-arm-kernel@...ts.infradead.org,
	kvmarm@...ts.linux.dev,
	linux-kernel@...r.kernel.org
Subject: [PATCH] KVM: arm64: vgic: fix GICR_STATUSR in vgic_v3_rd_registers

From: Jia Qingtong <jiaqingtong@...wei.com>

vgic_uaccess use bsearch search regs in vgic_io_device.regions, but the
GICR_STATUSR have wrong order in vgic_v3_rd_registers.
When check all vgic_register_region, it turned out that only
vgic_v3_rd_registers has this problem.

It's harmless since vgic_uaccess behaves as RAZ&WI when it can't find the
specified reg. This is exactly the same as the behavior of the GICR_STATUSR
register.

So just move GICR_STATUSR to the right place.

Signed-off-by: Jia Qingtong <jiaqingtong@...wei.com>
---
 arch/arm64/kvm/vgic/vgic-mmio-v3.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/kvm/vgic/vgic-mmio-v3.c b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
index 9e50928f5d7d..822b4c1a01dc 100644
--- a/arch/arm64/kvm/vgic/vgic-mmio-v3.c
+++ b/arch/arm64/kvm/vgic/vgic-mmio-v3.c
@@ -651,9 +651,6 @@ static const struct vgic_register_region vgic_v3_rd_registers[] = {
 	REGISTER_DESC_WITH_LENGTH(GICR_CTLR,
 		vgic_mmio_read_v3r_ctlr, vgic_mmio_write_v3r_ctlr, 4,
 		VGIC_ACCESS_32bit),
-	REGISTER_DESC_WITH_LENGTH(GICR_STATUSR,
-		vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
-		VGIC_ACCESS_32bit),
 	REGISTER_DESC_WITH_LENGTH(GICR_IIDR,
 		vgic_mmio_read_v3r_iidr, vgic_mmio_write_wi, 4,
 		VGIC_ACCESS_32bit),
@@ -661,6 +658,9 @@ static const struct vgic_register_region vgic_v3_rd_registers[] = {
 		vgic_mmio_read_v3r_typer, vgic_mmio_write_wi,
 		NULL, vgic_mmio_uaccess_write_wi, 8,
 		VGIC_ACCESS_64bit | VGIC_ACCESS_32bit),
+	REGISTER_DESC_WITH_LENGTH(GICR_STATUSR,
+		vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
+		VGIC_ACCESS_32bit),
 	REGISTER_DESC_WITH_LENGTH(GICR_WAKER,
 		vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
 		VGIC_ACCESS_32bit),

base-commit: 17a0005644994087794f6552d7a5e105d6976184
-- 
2.46.0