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Message-ID: <CADnq5_P6UT+sbR_4g9cmZ0fHZ4CgU5WLr-NZJ_uqnfEsJdZD_w@mail.gmail.com>
Date: Mon, 30 Sep 2024 11:49:22 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Igor Artemiev <Igor.A.Artemiev@...t.ru>
Cc: Alex Deucher <alexander.deucher@....com>,
Christian König <christian.koenig@....com>,
Xinhui Pan <Xinhui.Pan@....com>, David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
amd-gfx@...ts.freedesktop.org, dri-devel@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, lvc-project@...uxtesting.org
Subject: Re: [PATCH] drm/radeon/r600_cs: Fix possible int overflow in r600_packet3_check()
On Sun, Sep 29, 2024 at 8:08 PM Igor Artemiev <Igor.A.Artemiev@...t.ru> wrote:
>
> It is possible, although unlikely, that an integer overflow will occur
> when the result of radeon_get_ib_value() is shifted to the left.
>
> Avoid it by casting one of the operands to larger data type (u64).
>
> Found by Linux Verification Center (linuxtesting.org) with static
> analysis tool SVACE.
>
> Signed-off-by: Igor Artemiev <Igor.A.Artemiev@...t.ru>
The chips supported by this code only support a 32 bit internal GPU
address space, so it should never overflow. That said, I've applied
the patch. We already cast other similar code in that file.
Alex
> ---
> drivers/gpu/drm/radeon/r600_cs.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
> index 1b2d31c4d77c..ac77d1246b94 100644
> --- a/drivers/gpu/drm/radeon/r600_cs.c
> +++ b/drivers/gpu/drm/radeon/r600_cs.c
> @@ -2104,7 +2104,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
> return -EINVAL;
> }
>
> - offset = radeon_get_ib_value(p, idx+1) << 8;
> + offset = (u64)radeon_get_ib_value(p, idx+1) << 8;
> if (offset != track->vgt_strmout_bo_offset[idx_value]) {
> DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n",
> offset, track->vgt_strmout_bo_offset[idx_value]);
> --
> 2.39.2
>
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