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Message-ID: <172769365130.1880381.14526267729451326976.b4-ty@sntech.de>
Date: Mon, 30 Sep 2024 12:55:35 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: linux-rockchip@...ts.infradead.org,
Dragan Simic <dsimic@...jaro.org>
Cc: Heiko Stuebner <heiko@...ech.de>,
robh@...nel.org,
linux-arm-kernel@...ts.infradead.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org,
Robin Murphy <robin.murphy@....com>
Subject: Re: [PATCH] arm64: dts: rockchip: Move L3 cache outside CPUs in RK3588(S) SoC dtsi
On Thu, 26 Sep 2024 12:29:13 +0200, Dragan Simic wrote:
> Move the "l3_cache" node outside the "cpus" node in the base dtsi file for
> Rockchip RK3588(S) SoCs. The A55 and A76 CPU cores in these SoCs belong to
> the ARM DynamIQ IP core lineup, which places the L3 cache outside the CPUs
> and into the DynamIQ Shared Unit (DSU). [1] Thus, moving the L3 cache DT
> node one level higher in the DT improves the way the physical topology of
> the RK3588(S) SoCs is represented in the SoC dtsi files.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: rockchip: Move L3 cache outside CPUs in RK3588(S) SoC dtsi
commit: df5f6f2f62b9b50cef78f32909485b00fc7cf7f2
Best regards,
--
Heiko Stuebner <heiko@...ech.de>
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