lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240930132344.3001876-4-andrei.stefanescu@oss.nxp.com>
Date: Mon, 30 Sep 2024 16:23:44 +0300
From: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
To: Dong Aisheng <aisheng.dong@....com>,
	Fabio Estevam <festevam@...il.com>,
	Shawn Guo <shawnguo@...nel.org>,
	Jacky Bai <ping.bai@....com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Ghennadi Procopciuc <Ghennadi.Procopciuc@....nxp.com>,
	Chester Lin <chester62515@...il.com>,
	Matthias Brugger <mbrugger@...e.com>,
	Sascha Hauer <s.hauer@...gutronix.de>
Cc: Pengutronix Kernel Team <kernel@...gutronix.de>,
	linux-gpio@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	imx@...ts.linux.dev,
	NXP S32 Linux Team <s32@....com>,
	Christophe Lizzi <clizzi@...hat.com>,
	Alberto Ruiz <aruizrui@...hat.com>,
	Enric Balletbo <eballetb@...hat.com>,
	Andrei Stefanescu <andrei.stefanescu@....nxp.com>
Subject: [PATCH 3/3] arm64: dts: S32G3: add S32G3 compatible for the pinctrl node

Add the newly introduced S32G3 compatible for the pinctrl node.
Currently, it will fall back to the S32G2 compatible.

Signed-off-by: Andrei Stefanescu <andrei.stefanescu@....nxp.com>
---
 arch/arm64/boot/dts/freescale/s32g3.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
index b4226a9143c8..f6aafe44c9d7 100644
--- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
@@ -172,7 +172,8 @@ soc@0 {
 		ranges = <0 0 0 0x80000000>;
 
 		pinctrl: pinctrl@...9c240 {
-			compatible = "nxp,s32g2-siul2-pinctrl";
+			compatible = "nxp,s32g3-siul2-pinctrl",
+				     "nxp,s32g2-siul2-pinctrl";
 				/* MSCR0-MSCR101 registers on siul2_0 */
 			reg = <0x4009c240 0x198>,
 				/* MSCR112-MSCR122 registers on siul2_1 */
-- 
2.45.2


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ