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Message-Id: <20241001024356.1096072-16-anshuman.khandual@arm.com> Date: Tue, 1 Oct 2024 08:13:24 +0530 From: Anshuman Khandual <anshuman.khandual@....com> To: linux-kernel@...r.kernel.org, kvmarm@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org, maz@...nel.org Cc: Anshuman Khandual <anshuman.khandual@....com>, Oliver Upton <oliver.upton@...ux.dev>, James Morse <james.morse@....com>, Suzuki K Poulose <suzuki.poulose@....com>, Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, Mark Brown <broonie@...nel.org> Subject: [PATCH 15/47] arm64/sysreg: Add register fields for SPMDEVAFF_EL1 This adds register fields for SPMDEVAFF_EL1 as per the definitions based on DDI0601 2024-06. Cc: Catalin Marinas <catalin.marinas@....com> Cc: Will Deacon <will@...nel.org> Cc: Mark Brown <broonie@...nel.org> Cc: linux-arm-kernel@...ts.infradead.org Cc: linux-kernel@...r.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@....com> --- arch/arm64/tools/sysreg | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 865de0549a07..5d76c0ddcb85 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -114,6 +114,18 @@ Res0 63:1 Field 0 OSLK EndSysreg +Sysreg SPMDEVAFF_EL1 2 0 9 13 6 +Res0 63:40 +Field 39:32 Aff3 +Field 31 F0V +Field 30 U +Res0 29:25 +Field 24 MT +Field 23:16 Aff2 +Field 15:8 Aff1 +Field 7:0 Aff0 +EndSysreg + Sysreg ID_PFR0_EL1 3 0 0 1 0 Res0 63:32 UnsignedEnum 31:28 RAS -- 2.25.1
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