linux-kernel - Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for AmpereOne

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Message-ID: <Zvw/Kghyt9zUkupn@Asurada-Nvidia>
Date: Tue, 1 Oct 2024 11:27:54 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Yang Shi <yang@...amperecomputing.com>
CC: <jgg@...pe.ca>, <will@...nel.org>, <robin.murphy@....com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation
 for AmpereOne

On Tue, Oct 01, 2024 at 11:03:46AM -0700, Yang Shi wrote:
> Using 64 bit immediate when doing shift can solve the problem.  The
> disssembly after the fix looks like:

[...]

>         unsigned int last_sid_idx =
> -               arm_smmu_strtab_l1_idx((1 << smmu->sid_bits) - 1);
> +               arm_smmu_strtab_l1_idx((1UL << smmu->sid_bits) - 1);

Could a 32-bit build be a corner case where UL is no longer a
"64 bit" stated in the commit message?

Also, there are other places doing "1 << smmu->sid_bits", e.g.
arm_smmu_init_strtab_linear().

Then, can ssid_bits/s1cdmax be a concern similarly?

Thanks
Nicolin