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Message-Id: <20241001-wrapped-keys-dts-v7-1-a668519b7ffe@linaro.org>
Date: Tue, 01 Oct 2024 10:35:30 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Bjorn Andersson <andersson@...nel.org>, 
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, 
 Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, 
 Om Prakash Singh <quic_omprsing@...cinc.com>, 
 Neil Armstrong <neil.armstrong@...aro.org>, 
 Gaurav Kashyap <quic_gaurkash@...cinc.com>
Subject: [PATCH v7 1/2] arm64: dts: qcom: sm8650: extend the register range
 for UFS ICE

From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>

The Inline Crypto Engine (ICE) for UFS/EMMC supports the Hardware Key
Manager (HWKM) to securely manage storage keys. Enable using this
hardware on sm8650.

This requires us to increase the register range: HWKM is an additional
piece of hardware sitting alongside ICE, and extends the old ICE's
register space.

Reviewed-by: Om Prakash Singh <quic_omprsing@...cinc.com>
Tested-by: Neil Armstrong <neil.armstrong@...aro.org>
Signed-off-by: Gaurav Kashyap <quic_gaurkash@...cinc.com>
Co-developed-by: Gaurav Kashyap <quic_gaurkash@...cinc.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
---
 arch/arm64/boot/dts/qcom/sm8650.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 01ac3769ffa6..5986a33ddd8b 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2595,7 +2595,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
 		ice: crypto@...8000 {
 			compatible = "qcom,sm8650-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
-			reg = <0 0x01d88000 0 0x8000>;
+			reg = <0 0x01d88000 0 0x18000>;
 
 			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
 		};

-- 
2.43.0


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