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Message-ID: <Zv2diJDU6v60hKtU@Asurada-Nvidia>
Date: Wed, 2 Oct 2024 12:22:48 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: Yang Shi <yang@...amperecomputing.com>
CC: <jgg@...pe.ca>, <james.morse@....com>, <will@...nel.org>,
<robin.murphy@....com>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [v2 PATCH] iommu/arm-smmu-v3: Fix L1 stream table index
calculation for 32-bit sid size
On Wed, Oct 02, 2024 at 12:04:32PM -0700, Yang Shi wrote:
> > On Wed, Oct 02, 2024 at 10:55:14AM -0700, Yang Shi wrote:
> > > +static inline unsigned int arm_smmu_strtab_max_sid(struct arm_smmu_device *smmu)
> > > +{
> > > + return (1ULL << smmu->sid_bits);
> > > +}
> > > +
> > Hmm, why ULL gets truncated to unsigned int here?
>
> No particular reason, but it should be better to not truncate here. Will
> fix it.
Yea, and looks like we are going to do with:
static inline u64 arm_smmu_strtab_num_sids(struct arm_smmu_device *smmu);
Then let's be careful at those return-value holders too:
-----------------------------------------------------------
static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu)
{
u32 size;
struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg;
size = (1 << smmu->sid_bits) * sizeof(struct arm_smmu_ste);
^^^^
overflow?
[...]
cfg->linear.num_ents = 1 << smmu->sid_bits;
^^^^^^^^
This is u32
-----------------------------------------------------------
Thanks
Nicolin
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