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Message-ID: <kg7lh6gafeegmljsygukhfjiztx5wbothngtxrcreccao3itpy@f4bxf4w346ky>
Date: Wed, 2 Oct 2024 08:31:53 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Yao Zi <ziyao@...root.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Philipp Zabel <p.zabel@...gutronix.de>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Celeste Liu <CoelacanthusHex@...il.com>
Subject: Re: [PATCH 2/8] dt-bindings: reset: Add reset ID definition for
Rockchip RK3528
On Tue, Oct 01, 2024 at 04:23:56AM +0000, Yao Zi wrote:
> Similar to previous Rockchip generations, reset IDs for RK3528 SoC
> are register offsets.
>
> Signed-off-by: Yao Zi <ziyao@...root.org>
> ---
> .../dt-bindings/reset/rockchip,rk3528-cru.h | 292 ++++++++++++++++++
> 1 file changed, 292 insertions(+)
> create mode 100644 include/dt-bindings/reset/rockchip,rk3528-cru.h
>
> diff --git a/include/dt-bindings/reset/rockchip,rk3528-cru.h b/include/dt-bindings/reset/rockchip,rk3528-cru.h
> new file mode 100644
> index 000000000000..1f8c0d38bb88
> --- /dev/null
> +++ b/include/dt-bindings/reset/rockchip,rk3528-cru.h
> @@ -0,0 +1,292 @@
> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) */
Wrong license, run checkpatch.
Also, as Conor noted, this should eb squashed with device binding.
> +/*
> + * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
> + * Copyright (c) 2024 Yao Zi <ziyao@...root.org>
> + * Author: Joseph Chen <chenjh@...k-chips.com>
> + */
> +
> +#ifndef _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> +#define _DT_BINDINGS_RESET_ROCKCHIP_RK3528_H
> +
> +// CRU_SOFTRST_CON03 (Offset: 0xA0C)
> +#define SRST_CORE0_PO 0x00000030
> +#define SRST_CORE1_PO 0x00000031
> +#define SRST_CORE2_PO 0x00000032
> +#define SRST_CORE3_PO 0x00000033
> +#define SRST_CORE0 0x00000034
> +#define SRST_CORE1 0x00000035
> +#define SRST_CORE2 0x00000036
> +#define SRST_CORE3 0x00000037
> +#define SRST_NL2 0x00000038
> +#define SRST_CORE_BIU 0x00000039
> +#define SRST_CORE_CRYPTO 0x0000003A
> +
> +// CRU_SOFTRST_CON05 (Offset: 0xA14)
> +#define SRST_P_DBG 0x0000005D
> +#define SRST_POT_DBG 0x0000005E
> +#define SRST_NT_DBG 0x0000005F
What are all these? Registers? Not a binding.
Binding constants are numerical values from 0, incremented by one,
serving as abstraction layer between DTS and driver.
None of these here are bindings.
Best regards,
Krzysztof
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