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Message-ID: <Zv0blIPaF0Y2Pmn1@pineapple>
Date: Wed, 2 Oct 2024 10:08:20 +0000
From: Yao Zi <ziyao@...root.org>
To: Heiko Stübner <heiko@...ech.de>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Philipp Zabel <p.zabel@...gutronix.de>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
	Celeste Liu <CoelacanthusHex@...il.com>
Subject: Re: [PATCH 4/8] clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE

On Wed, Oct 02, 2024 at 10:16:49AM +0200, Heiko Stübner wrote:
> Hi,
> 
> Am Dienstag, 1. Oktober 2024, 06:23:58 CEST schrieb Yao Zi:
> > RK3528 comes with a new PLL type, flagged by ROCKCHIP_PLL_FIXED_MODE,
> > which should operate in normal mode only. Add corresponding definition
> > and handle it in code.
> > 
> 
> More commit message would be nice ;-) .

Good idea.

> It's the PPLL for the pcie controller that is specified in the manual to
> only work in normal mode. This is helpful for people reading along :-) .
> 
> Heiko

btw, for the documentation, is there any technical reference manual
of RK3528 available publicly? Please let me know if it's true, it will
be quite helpful to understand clock tree better :)

Thanks,
Yao Zi

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