linux-kernel - Re: [PATCH v1 06/11] reset: mpfs: add non-auxiliary bus probing

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Message-ID: <07764ea71869cc1c1f95200bcb4e0888fd705dec.camel@pengutronix.de>
Date: Wed, 02 Oct 2024 13:59:18 +0200
From: Philipp Zabel <p.zabel@...gutronix.de>
To: Conor Dooley <conor@...nel.org>, linux-kernel@...r.kernel.org
Cc: Conor Dooley <conor.dooley@...rochip.com>, Daire McNamara
 <daire.mcnamara@...rochip.com>, pierre-henry.moussay@...rochip.com, 
 valentina.fernandezalanis@...rochip.com, Michael Turquette
 <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring
 <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Jassi Brar
 <jassisinghbrar@...il.com>, Lee Jones <lee@...nel.org>, Paul Walmsley
 <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, Albert Ou
 <aou@...s.berkeley.edu>, Neil Armstrong <neil.armstrong@...aro.org>, Jerome
 Brunet <jbrunet@...libre.com>, Kevin Hilman <khilman@...libre.com>, Martin
 Blumenstingl <martin.blumenstingl@...glemail.com>,
 linux-riscv@...ts.infradead.org,  linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org,  linux-amlogic@...ts.infradead.org,
 linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v1 06/11] reset: mpfs: add non-auxiliary bus probing

On Mi, 2024-10-02 at 11:48 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> While the auxiliary bus was a nice bandaid, and meant that re-writing
> the representation of the clock regions in devicetree was not required,
> it has run its course. The "mss_top_sysreg" region that contains the
> clock and reset regions, also contains pinctrl and an interrupt
> controller, so the time has come rewrite the devicetree and probe the
> reset controller from an mfd devicetree node, rather than implement
> those drivers using the auxiliary bus. Wanting to avoid propagating this
> naive/incorrect description of the hardware to the new pic64gx SoC is a
> major motivating factor here.
> 
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
>  drivers/reset/reset-mpfs.c | 83 ++++++++++++++++++++++++++++++++------
>  1 file changed, 71 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/reset/reset-mpfs.c b/drivers/reset/reset-mpfs.c
> index 710f9c1676f93..ac72e0fc405ed 100644
> --- a/drivers/reset/reset-mpfs.c
> +++ b/drivers/reset/reset-mpfs.c
> @@ -9,10 +9,12 @@
>  #include <linux/auxiliary_bus.h>
>  #include <linux/delay.h>
>  #include <linux/io.h>
> +#include <linux/mfd/syscon.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
>  #include <linux/slab.h>
> +#include <linux/regmap.h>
>  #include <linux/reset-controller.h>
>  #include <dt-bindings/clock/microchip,mpfs-clock.h>
>  #include <soc/microchip/mpfs.h>
> @@ -27,14 +29,37 @@
>  #define MPFS_SLEEP_MIN_US	100
>  #define MPFS_SLEEP_MAX_US	200
>  
> +#define REG_SUBBLK_RESET_CR	0x88u
> +
>  /* block concurrent access to the soft reset register */
>  static DEFINE_SPINLOCK(mpfs_reset_lock);
>  
>  struct mpfs_reset {
>  	void __iomem *base;
> +	struct regmap *regmap;
>  	struct reset_controller_dev rcdev;
>  };
>  
> +static inline u32 mpfs_reset_read(struct mpfs_reset *rst)
> +{
> +	u32 ret;
> +
> +	if (rst->regmap)
> +		regmap_read(rst->regmap, REG_SUBBLK_RESET_CR, &ret);
> +	else
> +		ret = readl(rst->base);
> +
> +	return ret;
> +}
> +
> +static inline void mpfs_reset_write(struct mpfs_reset *rst, u32 val)
> +{
> +	if (rst->regmap)
> +		regmap_write(rst->regmap, REG_SUBBLK_RESET_CR, val);
> +	else
> +		writel(val, rst->base);
> +}
> +
>  static inline struct mpfs_reset *to_mpfs_reset(struct reset_controller_dev *rcdev)
>  {
>  	return container_of(rcdev, struct mpfs_reset, rcdev);
> @@ -51,9 +76,9 @@ static int mpfs_assert(struct reset_controller_dev *rcdev, unsigned long id)
>  
>  	spin_lock_irqsave(&mpfs_reset_lock, flags);
>  
> -	reg = readl(rst->base);
> +	reg = mpfs_reset_read(rst);
>  	reg |= BIT(id);
> -	writel(reg, rst->base);
> +	mpfs_reset_write(rst, reg);

This should use regmap_update_bits() in the regmap case, same in
mpfs_deassert().

regards
Philipp