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Message-ID: <7faeac1b-0b7a-a820-16a5-330b82d12e01@mediatek.com>
Date: Wed, 2 Oct 2024 20:42:38 +0800
From: Macpaul Lin <macpaul.lin@...iatek.com>
To: Fei Shao <fshao@...omium.org>, AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, <jianguo.zhang@...iatek.com>,
<jian.yang@...iatek.com>, <jieyy.yang@...iatek.com>
CC: Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Rob Herring
<robh@...nel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<linux-mediatek@...ts.infradead.org>, Bear Wang <bear.wang@...iatek.com>,
Pablo Sun <pablo.sun@...iatek.com>
Subject: Re: [PATCH 2/9] arm64: dts: mediatek: mt8188: Add PCIe nodes
On 10/2/24 19:41, Fei Shao wrote:
>
>
> External email : Please do not click links or open attachments until you
> have verified the sender or the content.
>
>
> Add PCIe node and the associated PHY node.
> Individual board device tree should enable the nodes as needed.
>
> Signed-off-by: Fei Shao <fshao@...omium.org>
> ---
>
> arch/arm64/boot/dts/mediatek/mt8188.dtsi | 62 ++++++++++++++++++++++++
> 1 file changed, 62 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> index 10195a4e4e9d..9431f3c5c228 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi
> @@ -1763,6 +1763,53 @@ xhci0: usb@...b0000 {
> status = "disabled";
> };
>
> + pcie: pcie@...f0000 {
> + compatible = "mediatek,mt8188-pcie", "mediatek,mt8192-pcie";
> + reg = <0 0x112f0000 0 0x2000>;
> + reg-names = "pcie-mac";
It seems the property 'linux,pci-domain = <0>;' is missing?
[snip]
> + };
> + };
> +
> nor_flash: spi@...2c000 {
> compatible = "mediatek,mt8188-nor", "mediatek,mt8186-nor";
> reg = <0 0x1132c000 0 0x1000>;
> @@ -1775,6 +1822,21 @@ nor_flash: spi@...2c000 {
> status = "disabled";
> };
>
> + pciephy: t-phy@...20700 {
> + compatible = "mediatek,mt8188-tphy", "mediatek,generic-tphy-v3";
> + ranges = <0 0 0x11c20700 0x700>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + status = "disabled";
> +
The power-domains property is missing.
It should be 'power-domains = <&spm MT8188_POWER_DOMAIN_PEXTP_PHY_TOP>;'
> + pcieport: pcie-phy@0 {
> + reg = <0 0x700>;
> + clocks = <&topckgen CLK_TOP_CFGREG_F_PCIE_PHY_REF>;
> + clock-names = "ref";
> + #phy-cells = <1>;
> + };
> + };
> +
> i2c1: i2c@...00000 {
> compatible = "mediatek,mt8188-i2c";
> reg = <0 0x11e00000 0 0x1000>,
Thanks!
Best regards,
Macpaul Lin
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