linux-kernel - [PATCH] arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio0 mdio pin numbers

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Message-Id: <20241002-cn9130-som-mdio-v1-1-0942be4dc550@solid-run.com>
Date: Wed, 02 Oct 2024 14:55:20 +0200
From: Josua Mayer <josua@...id-run.com>
To: Andrew Lunn <andrew@...n.ch>, 
 Gregory Clement <gregory.clement@...tlin.com>, 
 Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-stable@...r.kernel.org, 
 Josua Mayer <josua@...id-run.com>
Subject: [PATCH] arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio0 mdio pin
 numbers

SolidRun CN9130 SoM actually uses CP_MPP[0:1] for mdio. CP_MPP[40]
provides reference clock for dsa switch and ethernet phy on Clearfog
Pro, wheras MPP[41] controls efuse programming voltage "VHV".

Update the cp0 mdio pinctrl node to specify mpp0, mpp1.

Cc:  <linux-stable@...r.kernel.org>
Signed-off-by: Josua Mayer <josua@...id-run.com>
---
 arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
index 4676e3488f54d..cb8d54895a777 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-sr-som.dtsi
@@ -136,7 +136,7 @@ cp0_i2c0_pins: cp0-i2c0-pins {
 		};
 
 		cp0_mdio_pins: cp0-mdio-pins {
-			marvell,pins = "mpp40", "mpp41";
+			marvell,pins = "mpp0", "mpp1";
 			marvell,function = "ge";
 		};
 

---
base-commit: 9852d85ec9d492ebef56dc5f229416c925758edc
change-id: 20241002-cn9130-som-mdio-4a519e6dc7df

Sincerely,
-- 
Josua Mayer <josua@...id-run.com>