[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2d867c1f-2693-40f2-a410-2c83c253bea1@lunn.ch>
Date: Wed, 2 Oct 2024 15:50:11 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Josua Mayer <josua@...id-run.com>
Cc: Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH v2] arm64: dts: marvell: cn9130-sr-som: fix cp0 mdio pin
numbers
On Wed, Oct 02, 2024 at 03:07:16PM +0200, Josua Mayer wrote:
> SolidRun CN9130 SoM actually uses CP_MPP[0:1] for mdio. CP_MPP[40]
> provides reference clock for dsa switch and ethernet phy on Clearfog
> Pro, wheras MPP[41] controls efuse programming voltage "VHV".
>
> Update the cp0 mdio pinctrl node to specify mpp0, mpp1.
>
> Fixes: 1c510c7d82e5 ("arm64: dts: add description for solidrun cn9130 som and clearfog boards")
> Cc: stable@...r.kernel.org # 6.11.x
> Signed-off-by: Josua Mayer <josua@...id-run.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
Powered by blists - more mailing lists