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Message-ID:
 <OSQPR06MB7252DF4BB404D5C01785BB5B8B702@OSQPR06MB7252.apcprd06.prod.outlook.com>
Date: Wed, 2 Oct 2024 15:09:29 +0000
From: Billy Tsai <billy_tsai@...eedtech.com>
To: Bartosz Golaszewski <brgl@...ev.pl>, Linus Walleij
	<linus.walleij@...aro.org>
CC: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"joel@....id.au" <joel@....id.au>, "andrew@...econstruct.com.au"
	<andrew@...econstruct.com.au>, "linux-gpio@...r.kernel.org"
	<linux-gpio@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-aspeed@...ts.ozlabs.org"
	<linux-aspeed@...ts.ozlabs.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>, BMC-SW <BMC-SW@...eedtech.com>,
	"Peter.Yin@...ntatw.com" <Peter.Yin@...ntatw.com>, "Jay_Zhang@...ynn.com"
	<Jay_Zhang@...ynn.com>
Subject: Re: [PATCH v4 6/6] gpio: aspeed: Add the flush write to ensure the
 write complete.

> >
> > On Thu, Sep 19, 2024 at 11:43 AM Billy Tsai <billy_tsai@...eedtech.com> wrote:
> >
> > > Performing a dummy read ensures that the register write operation is fully
> > > completed, mitigating any potential bus delays that could otherwise impact
> > > the frequency of bitbang usage. E.g., if the JTAG application uses GPIO to
> > > control the JTAG pins (TCK, TMS, TDI, TDO, and TRST), and the application
> > > sets the TCK clock to 1 MHz, the GPIO’s high/low transitions will rely on
> > > a delay function to ensure the clock frequency does not exceed 1 MHz.
> > > However, this can lead to rapid toggling of the GPIO because the write
> > > operation is POSTed and does not wait for a bus acknowledgment.
> > >
> > > Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>
> >
> > If this applies cleanly on mainline I think it should go into fixes as-is.
> >
> > Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> >
> > Yours,
> > Linus Walleij

> I agree but it doesn't. :(

> Billy: please send it separately and - while at it - use a C-style comment.

> Bart

Hi Linus Walleij and Bart,

Sorry, I don’t quite understand the meaning of “send it separately.” 
Does this mean I need to send this patch individually after the GPIO patch series has been accepted?

Thanks

Billy Tsai

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