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Message-ID: <965d0f005ed9a36eeaefe69d897cad44839d06cc.camel@codeconstruct.com.au>
Date: Wed, 02 Oct 2024 12:15:43 +0930
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: "William A. Kennington III" <william@...nnington.com>, Tomer Maimon
	 <tmaimon77@...il.com>, Rob Herring <robh@...nel.org>
Cc: devicetree@...r.kernel.org, openbmc@...ts.ozlabs.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: nuvoton: Add UDC nodes

Hi William,

On Wed, 2024-09-25 at 02:39 -0700, William A. Kennington III wrote:
> The driver support was already added but we are missing the nodes in our
> common devicetree. This enables npcm7xx platforms to enable the udc
> nodes and expose USB devices endpoints.
> 
> Signed-off-by: William A. Kennington III <william@...nnington.com>
> ---
>  .../dts/nuvoton/nuvoton-common-npcm7xx.dtsi   | 71 +++++++++++++++++++
>  .../arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi | 65 +++++++++++++++++
>  2 files changed, 136 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> index 868454ae6bde..358b52894ac0 100644
> --- a/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> +++ b/arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi
> @@ -99,6 +99,11 @@ rst: rst@...000 {
>  		};
>  	};
>  
> +	udc0_phy: usb-phy {
> +		compatible = "usb-nop-xceiv";
> +		#phy-cells = <0>;
> +	};
> +
>  	ahb {
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> @@ -179,6 +184,72 @@ fiux: spi@...01000 {
>  			status = "disabled";
>  		};
>  
> +		udc5: udc@...35000 {

Testing this with `make CHECK_DTBS=y nuvoton/nuvoton-npcm750-evb.dtb`
causes the following additional warning:

+/home/andrew/src/kernel.org/linux/origin/build.multi_v5/arch/arm/boot/dts/nuvoton/nuvoton-npcm750-evb.dtb: udc@...35000: $nodename:0: 'udc@...35000' does not match '^usb(@.*)?'
+       from schema $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#

This is the same for all the other nodes added.

Can you please fix that up in a v2?

Andrew

> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0xf0835000 0x1000
> +			       0xfffd2800 0x800>;
> +			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc6: udc@...36000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0xf0836000 0x1000
> +			       0xfffd3000 0x800>;
> +			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc7: udc@...37000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0xf0837000 0x1000
> +			       0xfffd3800 0x800>;
> +			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc8: udc@...38000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0xf0838000 0x1000
> +			       0xfffd4000 0x800>;
> +			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc9: udc@...39000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0xf0839000 0x1000
> +			       0xfffd4800 0x800>;
> +			interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			nuvoton,sysgcr = <&gcr>;
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
>  		apb {
>  			#address-cells = <1>;
>  			#size-cells = <1>;
> diff --git a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
> index 30eed40b89b5..00615e7d1462 100644
> --- a/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
> +++ b/arch/arm/boot/dts/nuvoton/nuvoton-npcm750.dtsi
> @@ -58,5 +58,70 @@ gmac1: eth@...04000 {
>  					&rg2mdio_pins>;
>  			status = "disabled";
>  		};
> +
> +		udc0:udc@...30000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0x0 0xf0830000 0x0 0x1000
> +			       0x0 0xfffeb000 0x0 0x800>;
> +			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc1:udc@...31000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0x0 0xf0831000 0x0 0x1000
> +			       0x0 0xfffeb800 0x0 0x800>;
> +			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc2:udc@...32000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0x0 0xf0832000 0x0 0x1000
> +			       0x0 0xfffec000 0x0 0x800>;
> +			interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc3:udc@...33000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0x0 0xf0833000 0x0 0x1000
> +			       0x0 0xfffec800 0x0 0x800>;
> +			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
> +
> +		udc4:udc@...34000 {
> +			compatible = "nuvoton,npcm750-udc";
> +			reg = <0x0 0xf0834000 0x0 0x1000
> +			       0x0 0xfffed000 0x0 0x800>;
> +			interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clk NPCM7XX_CLK_SU>;
> +			clock-names = "clk_usb_bridge";
> +			phys = <&udc0_phy>;
> +			phy_type = "utmi_wide";
> +			dr_mode = "peripheral";
> +			status = "disabled";
> +		};
>  	};
>  };


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