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Message-ID: <2ecaa16e-e0ec-44af-8a0f-438dc25ca4c1@quicinc.com>
Date: Thu, 3 Oct 2024 11:11:27 +0530
From: Shivnandan Kumar <quic_kshivnan@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
        Sibi Sankar
	<quic_sibis@...cinc.com>,
        Jassi Brar <jassisinghbrar@...il.com>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        <cros-qcom-dts-watchers@...omium.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <devicetree@...r.kernel.org>,
        Ramakrishna Gottimukkula
	<quic_rgottimu@...cinc.com>
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sc7280: Add cpucp mbox node



On 9/25/2024 7:52 PM, Krzysztof Kozlowski wrote:
> On 24/09/2024 07:09, Shivnandan Kumar wrote:
>> Add the CPUCP mailbox node required for communication with CPUCP.
>>
>> Signed-off-by: Shivnandan Kumar <quic_kshivnan@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3d8410683402..4b9b26a75c62 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -4009,6 +4009,14 @@ gem_noc: interconnect@...0000 {
>>   			qcom,bcm-voters = <&apps_bcm_voter>;
>>   		};
>>
>> +		cpucp_mbox: mailbox@...30000 {
> 
> Are you sure you placed it in correct location (the order is by unit
> address, see DTS coding style).
> 

I will correct it in next series.


>> +			compatible = "qcom,sc7280-cpucp-mbox";
>> +			reg = <0 0x18590000 0 0x2000>,
>> +			      <0 0x17C00000 0 0x10>;
> 
> Lowercase hex... we just fixed it everywhere and you introduce again
> same issues.
>


ACK

> 
> 
> Best regards,
> Krzysztof
> 

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