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Message-ID: <7e5adthgwuqqpwvjbq7cs4gbtl6xv2fkdsf2zmmqvrpgvmbae6@gjsxa37bw6i6>
Date: Thu, 3 Oct 2024 11:52:05 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Conor Dooley <conor@...nel.org>
Cc: linux-riscv@...ts.infradead.org,
Conor Dooley <conor.dooley@...rochip.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Clément Léger <cleger@...osinc.com>,
Andy Chiu <andybnac@...il.com>, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [RFC v1 4/5] dt-bindings: riscv: add vector sub-extension
dependencies
On Wed, Oct 02, 2024 at 05:10:57PM +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Section 33.18.2. Zve*: Vector Extensions for Embedded Processors
> in [1] says:
> | The Zve32f and Zve64x extensions depend on the Zve32x extension. The Zve64f extension depends
> | on the Zve32f and Zve64x extensions. The Zve64d extension depends on the Zve64f extension
>
> | The Zve32x extension depends on the Zicsr extension. The Zve32f and Zve64f extensions depend
> | upon the F extension
>
> | The Zve64d extension depends upon the D extension
>
> Apply these rules to the bindings to help prevent invalid combinations.
>
> Link: https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-698e64a-2024-09-09 [1]
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> .../devicetree/bindings/riscv/extensions.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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