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Message-ID: <a657c632-b231-6f62-a45b-300921208582@quicinc.com>
Date: Sun, 6 Oct 2024 00:13:48 +0530
From: Sibi Sankar <quic_sibis@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: <andersson@...nel.org>, <konradybcio@...nel.org>, <krzk+dt@...nel.org>,
<robh+dt@...nel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<conor+dt@...nel.org>, <abel.vesa@...aro.org>,
<srinivas.kandagatla@...aro.org>
Subject: Re: [PATCH 2/2] arm64: dts: qcom: Add X1E001DE Snapdragon Devkit for
Windows
On 9/11/24 13:25, Dmitry Baryshkov wrote:
> On Wed, Sep 11, 2024 at 01:03:37PM GMT, Sibi Sankar wrote:
>> Add initial support for x1e001de devkit platform. This includes:
>>
>> -DSPs
>> -Ethernet (RTL8125BG) over the pcie 5 instance.
>> -NVme
>> -Wifi
>> -USB-C ports
>>
Hey Dmitry,
Thanks for taking time to review the series!
>> Link: https://www.qualcomm.com/news/releases/2024/05/qualcomm-accelerates-development-for-copilot--pcs-with-snapdrago
>> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/Makefile | 1 +
>> arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 813 +++++++++++++++++++
>> 2 files changed, 814 insertions(+)
>> create mode 100644 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>>
>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index ae002c7cf126..1cbc7b91389d 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -268,6 +268,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk-display-card.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
>> +dtb-$(CONFIG_ARCH_QCOM) += x1e001de-devkit.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += x1e78100-lenovo-thinkpad-t14s.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb
>> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>> new file mode 100644
>> index 000000000000..07b4e60d9b66
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>> @@ -0,0 +1,813 @@
>> +// SPDX-License-Identifier: BSD-3-Clause
>> +/*
>> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>> +
>> +#include "x1e80100.dtsi"
>> +#include "x1e80100-pmics.dtsi"
>> +
>> +/ {
>> + model = "Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows";
>> + compatible = "qcom,x1e001de-devkit", "qcom,x1e001de", "qcom,x1e80100";
>> +
>> + aliases {
>> + serial0 = &uart21;
>> + };
>> +
>> + chosen {
>> + stdout-path = "serial0:115200n8";
>> + };
>> +
>> + pmic-glink {
>> + compatible = "qcom,x1e80100-pmic-glink",
>> + "qcom,sm8550-pmic-glink",
>> + "qcom,pmic-glink";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
>> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
>> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
>> +
>> + /* Back panel port closer to the RJ45 connector */
>> + connector@0 {
>> + compatible = "usb-c-connector";
>> + reg = <0>;
>> + power-role = "dual";
>> + data-role = "dual";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + pmic_glink_ss0_hs_in: endpoint {
>> + remote-endpoint = <&usb_1_ss0_dwc3_hs>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + pmic_glink_ss0_ss_in: endpoint {
>> + remote-endpoint = <&usb_1_ss0_qmpphy_out>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + /* Back panel port closer to the audio jack */
>> + connector@1 {
>> + compatible = "usb-c-connector";
>> + reg = <1>;
>> + power-role = "dual";
>> + data-role = "dual";
>> +
>> + ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@0 {
>> + reg = <0>;
>> +
>> + pmic_glink_ss1_hs_in: endpoint {
>> + remote-endpoint = <&usb_1_ss1_dwc3_hs>;
>> + };
>> + };
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + pmic_glink_ss1_ss_in: endpoint {
>> + remote-endpoint = <&usb_1_ss1_qmpphy_out>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + /* Front panel port */
>> + connector@2 {
>> + compatible = "usb-c-connector";
>> + reg = <2>;
>> + power-role = "dual";
>> + data-role = "dual";
>> +
>
> [trimmed]
>
>> +
>> +&pcie5 {
>> + perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
>> + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
>> +
>> + vddpe-3v3-supply = <&vreg_wwan>;
>
> Please use pwrseq instead.
>
>> +
>> + pinctrl-0 = <&pcie5_default>;
>> + pinctrl-names = "default";
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie5_phy {
>> + vdda-phy-supply = <&vreg_l3i_0p8>;
>> + vdda-pll-supply = <&vreg_l3e_1p2>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie6a {
>> + perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
>> + wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
>> +
>> + vddpe-3v3-supply = <&vreg_nvme>;
>
> Please use pwrseq instead.
>
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pcie6a_default>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&pcie6a_phy {
>> + vdda-phy-supply = <&vreg_l1d_0p8>;
>> + vdda-pll-supply = <&vreg_l2j_1p2>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&qupv3_0 {
>> + status = "okay";
>> +};
>> +
>> +&qupv3_1 {
>> + status = "okay";
>> +};
>> +
>> +&qupv3_2 {
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_adsp {
>> + firmware-name = "qcom/x1e80100/devkit/qcadsp8380.mbn",
>> + "qcom/x1e80100/devkit/adsp_dtbs.elf";
>
> qcom/SoC/Vendor/Device/foo.ext. Here the Vendor part is missing.
>
>> +
>> + status = "okay";
>> +};
>> +
>> +&remoteproc_cdsp {
>> + firmware-name = "qcom/x1e80100/devkit/qccdsp8380.mbn",
>> + "qcom/x1e80100/devkit/cdsp_dtbs.elf";
>> +
>> + status = "okay";
>> +};
>> +
>> +&smb2360_0_eusb2_repeater {
>> + vdd18-supply = <&vreg_l3d_1p8>;
>> + vdd3-supply = <&vreg_l2b_3p0>;
>> +};
>> +
>> +&smb2360_1_eusb2_repeater {
>> + vdd18-supply = <&vreg_l3d_1p8>;
>> + vdd3-supply = <&vreg_l14b_3p0>;
>> +};
>> +
>> +&smb2360_2 {
>> + status = "okay";
>> +};
>> +
>> +&smb2360_2_eusb2_repeater {
>> + vdd18-supply = <&vreg_l3d_1p8>;
>> + vdd3-supply = <&vreg_l8b_3p0>;
>> +};
>> +
>> +&tlmm {
>> + gpio-reserved-ranges = <34 2>, /* Unused */
>> + <44 4>, /* SPI (TPM) */
>> + <238 1>; /* UFS Reset */
>
> A comment would be nice. Usually the GPIOs are reserved because
> accessing them is forbidden by TZ / hyp. Is this the case for the Unused
> GPIOs? And why is the UFS reset marked as reserved?
I went back and figured out that 34,35 and 238 are no longer reserved.
It might be the case for other devices as well. I'll fix that.
>
>> +
>> + nvme_reg_en: nvme-reg-en-state {
>> + pins = "gpio18";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
>> +
>> + pcie4_default: pcie4-default-state {
>> + clkreq-n-pins {
>> + pins = "gpio147";
>> + function = "pcie4_clk";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + perst-n-pins {
>> + pins = "gpio146";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
>> +
>> + wake-n-pins {
>> + pins = "gpio148";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + pcie5_default: pcie5-default-state {
>> + clkreq-n-pins {
>> + pins = "gpio150";
>> + function = "pcie5_clk";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + perst-n-pins {
>> + pins = "gpio149";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
>> +
>> + wake-n-pins {
>> + pins = "gpio151";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + pcie6a_default: pcie6a-default-state {
>> + clkreq-n-pins {
>> + pins = "gpio153";
>> + function = "pcie6a_clk";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> +
>> + perst-n-pins {
>> + pins = "gpio152";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-disable;
>> + };
>> +
>> + wake-n-pins {
>> + pins = "gpio154";
>> + function = "gpio";
>> + drive-strength = <2>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + wwan_sw_en: wwan-sw-en-state {
>> + pins = "gpio221";
>> + function = "gpio";
>> + drive-strength = <4>;
>> + bias-disable;
>> + };
>> +};
>> +
>> +&uart21 {
>> + compatible = "qcom,geni-debug-uart";
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss0_hsphy {
>> + vdd-supply = <&vreg_l3j_0p8>;
>> + vdda12-supply = <&vreg_l2j_1p2>;
>> +
>> + phys = <&smb2360_0_eusb2_repeater>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss0_qmpphy {
>> + vdda-phy-supply = <&vreg_l3e_1p2>;
>> + vdda-pll-supply = <&vreg_l1j_0p8>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss0 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss0_dwc3 {
>> + dr_mode = "host";
>> +};
>> +
>> +&usb_1_ss0_dwc3_hs {
>> + remote-endpoint = <&pmic_glink_ss0_hs_in>;
>> +};
>> +
>> +&usb_1_ss0_qmpphy_out {
>> + remote-endpoint = <&pmic_glink_ss0_ss_in>;
>> +};
>> +
>> +&usb_1_ss1_hsphy {
>> + vdd-supply = <&vreg_l3j_0p8>;
>> + vdda12-supply = <&vreg_l2j_1p2>;
>> +
>> + phys = <&smb2360_1_eusb2_repeater>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss1_qmpphy {
>> + vdda-phy-supply = <&vreg_l3e_1p2>;
>> + vdda-pll-supply = <&vreg_l2d_0p9>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss1 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss1_dwc3 {
>> + dr_mode = "host";
>
> All three USB-C connectors have data-role set to "dual". So this needs a
> comment.
Docs show that only port0 supports DRD. Will fix it in v2.
-Sibi
>
>> +};
>> +
>> +&usb_1_ss1_dwc3_hs {
>> + remote-endpoint = <&pmic_glink_ss1_hs_in>;
>> +};
>> +
>> +&usb_1_ss1_qmpphy_out {
>> + remote-endpoint = <&pmic_glink_ss1_ss_in>;
>> +};
>> +
>> +&usb_1_ss2_hsphy {
>> + vdd-supply = <&vreg_l3j_0p8>;
>> + vdda12-supply = <&vreg_l2j_1p2>;
>> +
>> + phys = <&smb2360_2_eusb2_repeater>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss2_qmpphy {
>> + vdda-phy-supply = <&vreg_l3e_1p2>;
>> + vdda-pll-supply = <&vreg_l2d_0p9>;
>> +
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss2 {
>> + status = "okay";
>> +};
>> +
>> +&usb_1_ss2_dwc3 {
>> + dr_mode = "host";
>> +};
>> +
>> +&usb_1_ss2_dwc3_hs {
>> + remote-endpoint = <&pmic_glink_ss2_hs_in>;
>> +};
>> +
>> +&usb_1_ss2_qmpphy_out {
>> + remote-endpoint = <&pmic_glink_ss2_ss_in>;
>> +};
>> --
>> 2.34.1
>>
>
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