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Message-ID: <2q7yoc2rrlbusqqjc3j5arxhjbrl4u4uykwg2mvrqedoe3bzxx@t3et2e2slgwx>
Date: Sun, 6 Oct 2024 20:31:34 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Sibi Sankar <quic_sibis@...cinc.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, krzk+dt@...nel.org,
robh+dt@...nel.org, linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
devicetree@...r.kernel.org, conor+dt@...nel.org, abel.vesa@...aro.org,
srinivas.kandagatla@...aro.org, quic_jjohnson@...cinc.com
Subject: Re: [PATCH V2 2/2] arm64: dts: qcom: Add X1E001DE Snapdragon Devkit
for Windows
On Sat, Oct 05, 2024 at 11:52:50PM GMT, Sibi Sankar wrote:
> Add initial support for x1e001de devkit platform. This includes:
>
> -DSPs
> -Ethernet (RTL8125BG) over the pcie 5 instance.
> -NVme
> -Wifi
> -USB-C ports
>
> Link: https://www.qualcomm.com/news/releases/2024/05/qualcomm-accelerates-development-for-copilot--pcs-with-snapdrago
> Signed-off-by: Sibi Sankar <quic_sibis@...cinc.com>
> ---
>
> v2:
> * Fix Ghz -> GHz [Jeff]
> * Pick up Ab tag from Rob.
> * Use Vendor in ADSP/CDSP firmware path [Dmitry]
> * Fix reserved gpios [Dmitry]
> * Only port0 supports DRD update the dt accordingly [Dmitry]
>
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/x1e001de-devkit.dts | 811 +++++++++++++++++++
> 2 files changed, 812 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
>
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index ae002c7cf126..1cbc7b91389d 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -268,6 +268,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk-display-card.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8650-hdk.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8650-mtp.dtb
> dtb-$(CONFIG_ARCH_QCOM) += sm8650-qrd.dtb
> +dtb-$(CONFIG_ARCH_QCOM) += x1e001de-devkit.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e78100-lenovo-thinkpad-t14s.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-asus-vivobook-s15.dtb
> dtb-$(CONFIG_ARCH_QCOM) += x1e80100-crd.dtb
> diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> new file mode 100644
> index 000000000000..afd718c25be7
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts
> @@ -0,0 +1,811 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +/*
> + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +
> +#include "x1e80100.dtsi"
> +#include "x1e80100-pmics.dtsi"
> +
> +/ {
> + model = "Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows";
> + compatible = "qcom,x1e001de-devkit", "qcom,x1e001de", "qcom,x1e80100";
> +
> + aliases {
> + serial0 = &uart21;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + pmic-glink {
> + compatible = "qcom,x1e80100-pmic-glink",
> + "qcom,sm8550-pmic-glink",
> + "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
> +
> + /* Back panel port closer to the RJ45 connector */
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_ss0_hs_in: endpoint {
> + remote-endpoint = <&usb_1_ss0_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss0_ss_in: endpoint {
> + remote-endpoint = <&usb_1_ss0_qmpphy_out>;
> + };
> + };
No SBU? Please at least document, which ports have DP support by adding
the SBU nodes and a comment why the DP is not wired up (e.g. lack of the
retimer driver).
> + };
> + };
> +
> + /* Back panel port closer to the audio jack */
> + connector@1 {
> + compatible = "usb-c-connector";
> + reg = <1>;
> + power-role = "dual";
> + data-role = "host";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_ss1_hs_in: endpoint {
> + remote-endpoint = <&usb_1_ss1_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss1_ss_in: endpoint {
> + remote-endpoint = <&usb_1_ss1_qmpphy_out>;
> + };
> + };
> + };
> + };
> +
> + /* Front panel port */
> + connector@2 {
> + compatible = "usb-c-connector";
> + reg = <2>;
> + power-role = "dual";
> + data-role = "host";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_ss2_hs_in: endpoint {
> + remote-endpoint = <&usb_1_ss2_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss2_ss_in: endpoint {
> + remote-endpoint = <&usb_1_ss2_qmpphy_out>;
> + };
> + };
> + };
> + };
> + };
> +
> + reserved-memory {
> + linux,cma {
> + compatible = "shared-dma-pool";
> + size = <0x0 0x8000000>;
> + reusable;
> + linux,cma-default;
> + };
> + };
> +
> + vph_pwr: vph-pwr-regulator {
regulator-vphh-pwr.
> + compatible = "regulator-fixed";
> +
> + regulator-name = "vph_pwr";
> + regulator-min-microvolt = <3700000>;
> + regulator-max-microvolt = <3700000>;
> +
> + regulator-always-on;
> + regulator-boot-on;
> + };
> +
> + vreg_nvme: regulator-nvme {
Sort nodes alphabetically.
> + compatible = "regulator-fixed";
> +
> + regulator-name = "VREG_NVME_3P3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&nvme_reg_en>;
> + };
> +
> + vreg_wwan: regulator-wwan {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "SDX_VPH_PWR";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> +
> + pinctrl-0 = <&wwan_sw_en>;
> + pinctrl-names = "default";
> +
> + regulator-boot-on;
> + };
> +};
> +
[skipped]
> +
> +&pcie4 {
> + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
> + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
> +
> + pinctrl-0 = <&pcie4_default>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pcie4_phy {
> + vdda-phy-supply = <&vreg_l3i_0p8>;
> + vdda-pll-supply = <&vreg_l3e_1p2>;
> +
> + status = "okay";
> +};
> +
> +&pcie5 {
> + perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
> + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
> +
> + vddpe-3v3-supply = <&vreg_wwan>;
pwrseq.
> +
> + pinctrl-0 = <&pcie5_default>;
> + pinctrl-names = "default";
> +
> + status = "okay";
> +};
> +
> +&pcie5_phy {
> + vdda-phy-supply = <&vreg_l3i_0p8>;
> + vdda-pll-supply = <&vreg_l3e_1p2>;
> +
> + status = "okay";
> +};
> +
> +&pcie6a {
> + perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
> + wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
> +
> + vddpe-3v3-supply = <&vreg_nvme>;
pwrseq.
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pcie6a_default>;
> +
> + status = "okay";
> +};
> +
> +&pcie6a_phy {
> + vdda-phy-supply = <&vreg_l1d_0p8>;
> + vdda-pll-supply = <&vreg_l2j_1p2>;
> +
> + status = "okay";
> +};
> +
> +&qupv3_0 {
> + status = "okay";
> +};
> +
> +&qupv3_1 {
> + status = "okay";
> +};
> +
> +&qupv3_2 {
> + status = "okay";
> +};
> +
> +&remoteproc_adsp {
> + firmware-name = "qcom/x1e80100/THUNDERCOMM/DEVKIT/qcadsp8380.mbn",
> + "qcom/x1e80100/THUNDERCOMM/DEVKIT/adsp_dtbs.elf";
Thundercomm, not THUNDERCOMM. Also, which devkit? does it have some
name? Usually there is a model or a codename for a device.
> +
> + status = "okay";
> +};
> +
> +&remoteproc_cdsp {
> + firmware-name = "qcom/x1e80100/THUNDERCOMM/DEVKIT/qccdsp8380.mbn",
> + "qcom/x1e80100/THUNDERCOMM/DEVKIT/cdsp_dtbs.elf";
> +
> + status = "okay";
> +};
> +
[skipped]
> +
> +&usb_1_ss0_hsphy {
> + vdd-supply = <&vreg_l3j_0p8>;
> + vdda12-supply = <&vreg_l2j_1p2>;
> +
> + phys = <&smb2360_0_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss0_qmpphy {
> + vdda-phy-supply = <&vreg_l3e_1p2>;
> + vdda-pll-supply = <&vreg_l1j_0p8>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss0 {
> + status = "okay";
> +};
> +
> +&usb_1_ss0_dwc3 {
> + dr_mode = "host";
How does it match the data-role = "dual" set for connector@0? What does
UCSI report for all the ports?
> +};
> +
> +&usb_1_ss0_dwc3_hs {
> + remote-endpoint = <&pmic_glink_ss0_hs_in>;
> +};
> +
> +&usb_1_ss0_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss0_ss_in>;
> +};
> +
> +&usb_1_ss1_hsphy {
> + vdd-supply = <&vreg_l3j_0p8>;
> + vdda12-supply = <&vreg_l2j_1p2>;
> +
> + phys = <&smb2360_1_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss1_qmpphy {
> + vdda-phy-supply = <&vreg_l3e_1p2>;
> + vdda-pll-supply = <&vreg_l2d_0p9>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss1 {
> + status = "okay";
> +};
> +
> +&usb_1_ss1_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&usb_1_ss1_dwc3_hs {
> + remote-endpoint = <&pmic_glink_ss1_hs_in>;
> +};
> +
> +&usb_1_ss1_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss1_ss_in>;
> +};
> +
> +&usb_1_ss2_hsphy {
> + vdd-supply = <&vreg_l3j_0p8>;
> + vdda12-supply = <&vreg_l2j_1p2>;
> +
> + phys = <&smb2360_2_eusb2_repeater>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss2_qmpphy {
> + vdda-phy-supply = <&vreg_l3e_1p2>;
> + vdda-pll-supply = <&vreg_l2d_0p9>;
> +
> + status = "okay";
> +};
> +
> +&usb_1_ss2 {
> + status = "okay";
> +};
> +
> +&usb_1_ss2_dwc3 {
> + dr_mode = "host";
> +};
> +
> +&usb_1_ss2_dwc3_hs {
> + remote-endpoint = <&pmic_glink_ss2_hs_in>;
> +};
> +
> +&usb_1_ss2_qmpphy_out {
> + remote-endpoint = <&pmic_glink_ss2_ss_in>;
> +};
> --
> 2.34.1
>
--
With best wishes
Dmitry
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