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Message-ID: <f434f714-b38f-4ed2-97f4-8f00a03b855b@os.amperecomputing.com>
Date: Mon, 7 Oct 2024 10:49:57 -0700
From: Yang Shi <yang@...amperecomputing.com>
To: Daniel Mentz <danielmentz@...gle.com>
Cc: jgg@...pe.ca, nicolinc@...dia.com, james.morse@....com, will@...nel.org,
 robin.murphy@....com, linux-arm-kernel@...ts.infradead.org,
 iommu@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [v3 PATCH] iommu/arm-smmu-v3: Fix L1 stream table index
 calculation for 32-bit sid size



On 10/7/24 9:36 AM, Daniel Mentz wrote:
> On Fri, Oct 4, 2024 at 6:53 PM Yang Shi <yang@...amperecomputing.com> wrote:
>>>>> On a related note, in arm_smmu_init_strtab_2lvl() we're capping the
>>>>> number of l1 entries at STRTAB_MAX_L1_ENTRIES for 2 level stream
>>>>> tables. I'm thinking it would make sense to limit the size of linear
>>>>> stream tables for the same reasons.
>>>> Yes, this also works. But I don't know what value should be used. Jason
>>>> actually suggested (size > SIZE_512M) in v2 review, but I thought the
>>>> value is a magic number. Why 512M? Just because it is too large for
>>>> allocation. So I picked up SIZE_MAX, just because it is the largest size
>>>> supported by size_t type.
>>> I think it should be capped to STRTAB_MAX_L1_ENTRIES
>> I'm not expert on SMMU. Does the linear stream table have the same cap
>> as 2-level stream table? Is this defined by the hardware spec? If it is
>> not, why should we pick this value?
> No. I don't think it's defined by the architecture specification. I
> don't have a strong opinion on the particular value for the size limit
> of linear Stream tables. However, I do believe that we should pick a
> size limit. Today, the driver limits the number of Level-1 Stream
> Table Descriptors in a 2-level Stream table. For consistency, we
> should limit the size of linear Stream tables, too.

We are on the same page regarding having the size limit. Took a look at 
the definition of STRTAB_MAX_L1_ENTRIES, I saw this comment:

/*
  * Stream table.
  *
  * Linear: Enough to cover 1 << IDR1.SIDSIZE entries
  * 2lvl: 128k L1 entries,
  *       256 lazy entries per table (each table covers a PCI bus)
  */

I'm not sure whether the comment for linear is still true or not with 
large IDR1.SIDSIZE. But using STRTAB_MAX_L1_ENTRIES for linear does have 
conflict with the comment. I will pick U32_MAX for now since it is the 
largest size on 32-bit and good enough to prevent from overflow.



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